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公开(公告)号：US10579519B2
公开(公告)日：2020-03-03
申请号：US15746618
申请日：2015-07-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Mark David Lillibridge , Gary Gostin , Paolo Faraboschi , Derek Alan Sherlock , Harvey Ray
Abstract: In some examples, each processor of a plurality of processors applies an interleave transform to perform interleaved access of a plurality of memory banks, where for any given memory address in use by the plurality of processors, applying any of the interleave transforms results in selection of a same memory bank of the plurality of memory banks and a same address within the same memory bank.
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公开(公告)号：US10146699B2
公开(公告)日：2018-12-04
申请号：US15500576
申请日：2015-04-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Mark David Lillibridge , Paolo Faraboschi
IPC: G06F12/02 , G06F12/1036 , G06F12/0804
Abstract: Apertures of a first size in a first physical address space of at least one processor are mapped to respective blocks of the first size in a second address space of a storage medium. Apertures of a second size in the first physical address space are mapped to respective blocks of the second size in the second address space, the second size being different from the first size.
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公开(公告)号：US20180217929A1
公开(公告)日：2018-08-02
申请号：US15746618
申请日：2015-07-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Mark David Lillibridge , Gary Gostin , Paolo Faraboschi , Derek Alan Sherlock , Harvey Ray
CPC classification number: G06F12/0607 , G06F3/0611 , G06F3/0644 , G06F3/0659 , G06F3/0673 , G06F2212/1016 , G06F2212/1024
Abstract: In some examples, each processor of a plurality of processors applies an interleave transform to perform interleaved access of a plurality of memory banks, where for any given memory address in use by the plurality of processors, applying any of the interleave transforms results in selection of a same memory bank of the plurality of memory banks and a same address within the same memory bank.
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