Abstract:
A state detection system includes a computation unit that acquires data detected by a sensor. The computation unit includes a processing device that executes data processing. The processing device converts data of a digitized time-series signal from a sensor, into data on frequency spectrum intensity. The processing device converts a partial area in an overall area in which values of data on frequency spectrum intensity are distributed, into data expressed in low bits. The processing device generates a pseudo image, based on the data expressed in low bits. The processing device classifies the pseudo image, based on image recognition, and outputs a result of classification of a state of a facility.
Abstract:
A reservoir computer based on an echo state network is efficiently implemented on hardware, and a trade-off relationship between a total number of neurons that can be implemented and a processing speed can be eliminated. A reservoir layer of the reservoir computer is divided into a plurality of sub-reservoirs, each of the sub-reservoirs includes a plurality of reservoir neurons, each of the reservoir neurons includes a selector, a multiplier, an integrator, and an activation function calculator that are arranged in this order. According to a selection signal, the selector sequentially selects one of a reservoir input signal and output signals from the reservoir neurons each of which is multiplied by a non-zero weight in the multiplier.
Abstract:
A computing apparatus includes at least one computing device including a computation area. The computing apparatus acquires input information, generates a plurality of input feature maps from the input information, and performs DNN computation in parallel on the generated plurality of input feature maps by at least one DNN partitioning method including channel partitioning. In the channel partitioning, by grouping the feature maps into sets grouping the feature maps without partitioning the feature maps and allocating each set grouping the feature maps to each computation area, computation for layers is performed.
Abstract:
Provided is a sensor that is highly accurate while ensuring reduced power consumption. A sensor is an electronic circuit that includes a sensor element, an analog filter, an A/D converter, and first and second electronic circuit. The analog filter filters a waveform that includes a sensor signal from the sensor element and noise based on a servo signal. The A/D converter converts the waveform filtered by the analog filter into a first digital signal. The first electronic circuit includes a digital filter and acquires a second digital signal by performing signal processing including at least a filtering process on the servo signal by using the digital filter. The second electronic circuit acquires a third digital signal by subtracting the second digital signal from the first digital signal. A setting for the signal processing for acquiring the second digital signal is changed on the basis of the third digital signal.
Abstract:
An acceleration sensor that achieves a simultaneous operation method of a signal detection and a servo control is provided as an alternative to a time-division processing method. The acceleration sensor is a MEMS capacitive acceleration sensor. The acceleration sensor includes signal detection capacitor pairs 12, 15, and DC servo control capacitor pairs 13, 16, and AC servo control capacitor pairs 14, 17, which are different from the signal detection capacitor pairs 12, 15. A voltage that generates a force in a direction opposite to a detection signal of acceleration detected by the signal detection capacitor pairs 12, 15 is applied to the DC servo control capacitor pairs 13, 16 and the AC servo control capacitor pairs 14, 17.
Abstract:
A reference A/D conversion unit is connected in parallel to an input common to a time-interleaved A/D converter to be a calibration target, and the output of each unitary A/D conversion unit which makes up the time-interleaved A/D converter is calibrated in a digital region by using a low-speed high-resolution A/D conversion result output from the reference A/D conversion unit. Also, fCLK/N (fCLK represents an overall sampling rate of the time-interleaved A/D converter, and N is relatively prime to the number of unitary A/D conversion units connected in parallel M) is set as the operation clock frequency of the reference A/D conversion unit. Samplings of all unitary A/D conversion units can be sequentially synchronized with the sampling of the reference A/D conversion unit, and the operation clock frequency of the reference A/D converter can be made N times slower than the overall sampling rate of the time-interleaved A/D converter.
Abstract:
An information processing device includes a parallel deep neural network configured to input a captured image of an article to deep neural network models respectively corresponding to a plurality of articles and perform inferences about the plurality of articles in parallel using the deep neural network models, a new article determination unit configured to determine whether an article included in the image is an unlearned article based on learned model information about the articles and the image, and a new article learning unit configured to learn a deep neural network model corresponding to the article determined to be unlearned based on the image and initial model configuration information about the deep neural network model when the article included in the image is determined to be an unlearned article. The new article learning unit adds the learned deep neural network model to the deep neural network models.
Abstract:
According to one embodiment, provided is an information processing system including a parent device and a plurality of child devices. The child device constitutes at least a portion of at least one device selected from a function approximator and an annealing machine, each of the parent devices and the plurality of child devices include a communication interface, and the communication interface is at least one selected from a wireless communication interface and a wired communication interface including an analog circuit. Data to be processed by the child device is transmitted from the parent device to at least one of the plurality of child devices, and an output of at least one node of the child device is transmitted to at least one of the parent device and the other child devices.
Abstract:
An image processing device including a storage unit configured to store an object detection neural network trained using a first K-channel image generated from a first M-channel image and a first N-channel image generated from the first M-channel image, a reception unit configured to receive, from a sensor, a second M-channel image and a second N-channel image that include an identical subject, and an image analysis unit configured to generate, using the object detection neural network trained using the first K-channel image, object detection result information with respect to a second K-channel image generated from the second M-channel image and the second N-channel image, and output the object detection result information.
Abstract:
In a MEMS electrostatic capacitor type acceleration sensor, the manufacturing costs of MEMS elements are reduced, and at the same time, the variations of the electrical and mechanical characteristics of the MEMS elements are reduced. A detection circuit generates a voltage signal corresponding to the product of a difference between the two capacitance values of a pair of MEMS capacitors and a servo signal. A modulation circuit outputs a signal corresponding to the difference between the capacitance values using the servo signal. The control circuit outputs the servo signal on the basis of a signal corresponding to the difference between the capacitance values.