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公开(公告)号:US20180025973A1
公开(公告)日:2018-01-25
申请号:US15715654
申请日:2017-09-26
Applicant: Huawei Technologies Co., Ltd.
Inventor: HuiLi Fu , Xiaodong Zhang , Jyh Rong Lin , Zhiqiang Ma
IPC: H01L23/528 , H01L23/49
Abstract: The present embodiments provides a chip, including a carrier, a redistribution structure, and multiple packaging function modules, where the multiple packaging function modules each have at least a part wrapped by a colloid, and are fastened to the redistribution structure side by side; the redistribution structure is fastened to the carrier, and the redistribution structure includes one or more redistribution metal layers; the redistribution metal layer communicatively connects the multiple packaging function modules and the carrier. The redistribution structure further includes one or more interconnect metal layers, and the interconnect metal layer is communicatively connected to at least two packaging function modules so as to provide a signal path between the at least two packaging function modules. In the chip, two packaging function modules are placed on the carrier side by side, and a signal path is established between the two packaging function modules by using the redistribution structure.
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公开(公告)号:US10784181B2
公开(公告)日:2020-09-22
申请号:US15905044
申请日:2018-02-26
Applicant: Huawei Technologies Co., Ltd.
Inventor: HuiLi Fu , Jyh Rong Lin , Shujie Cai
IPC: H01L23/373 , H01L23/42 , H01L21/48 , H01L23/367
Abstract: An apparatus includes a circuit device, a heat sink fin, and a thermal interface material layer. The thermal interface material layer is thermally coupled to the circuit device and the heat sink fin. The thermal interface material layer includes a first alloy layer, a nanometal particle layer, and a second alloy layer. The first alloy layer is thermally coupled to the circuit device. The nanometal particle layer is thermally coupled to the first alloy layer. The nanometal particle layer includes nanometal particles and an intermediate mixture.
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公开(公告)号:US10475741B2
公开(公告)日:2019-11-12
申请号:US15715654
申请日:2017-09-26
Applicant: Huawei Technologies Co., Ltd.
Inventor: HuiLi Fu , Xiaodong Zhang , Jyh Rong Lin , Zhiqiang Ma
IPC: H01L23/528 , H01L21/56 , H01L23/49 , H01L23/532
Abstract: The present embodiments provides a chip, including a carrier, a redistribution structure, and multiple packaging function modules, where the multiple packaging function modules each have at least a part wrapped by a colloid, and are fastened to the redistribution structure side by side; the redistribution structure is fastened to the carrier, and the redistribution structure includes one or more redistribution metal layers; the redistribution metal layer communicatively connects the multiple packaging function modules and the carrier. The redistribution structure further includes one or more interconnect metal layers, and the interconnect metal layer is communicatively connected to at least two packaging function modules so as to provide a signal path between the at least two packaging function modules. In the chip, two packaging function modules are placed on the carrier side by side, and a signal path is established between the two packaging function modules by using the redistribution structure.
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公开(公告)号:US20180190590A1
公开(公告)日:2018-07-05
申请号:US15858302
申请日:2017-12-29
Applicant: Huawei Technologies Co., Ltd.
Inventor: Chih Chiang Ma , Jyh Rong Lin , Xiaodong Zhang
IPC: H01L23/538 , H01L23/00 , H01L23/31 , H01L23/66
CPC classification number: H01L23/5386 , H01L21/563 , H01L21/568 , H01L23/3128 , H01L23/49811 , H01L23/5384 , H01L23/5389 , H01L23/66 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/25 , H01L24/96 , H01L2223/6611 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/24011 , H01L2224/24137 , H01L2224/25171 , H01L2224/25175 , H01L2224/25177 , H01L2224/32225 , H01L2224/73204 , H01L2224/81203 , H01L2224/81815 , H01L2224/92125 , H01L2924/14 , H01L2924/141 , H01L2924/143 , H01L2924/15311 , H01L2924/351
Abstract: A packaged chip, including a package structure, a redistribution structure, and a carrier, where the package structure includes a first chip and a second chip adjacent to the first chip. The redistribution structure is configured to electrically connect the first chip and the carrier, and is configured to electrically connect the second chip and the carrier. The redistribution structure includes a main body made of an insulating material and a bump solder array welded to a lower surface of the main body. A metal redistribution wire group and a metal interconnection wire group that has a curve or bend design are disposed in the main body. An upper surface of the main body of the redistribution structure adheres to a lower surface of the first chip and a lower surface of the second chip. The redistribution structure is welded to an upper surface of the carrier.
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公开(公告)号:US20180190566A1
公开(公告)日:2018-07-05
申请号:US15905044
申请日:2018-02-26
Applicant: Huawei Technologies Co., Ltd.
Inventor: HuiLi Fu , Jyh Rong Lin , Shujie Cai
IPC: H01L23/373 , H01L23/367 , H01L21/48
CPC classification number: H01L23/3733 , H01L21/4871 , H01L21/4882 , H01L23/3672 , H01L23/3735 , H01L23/3736 , H01L23/42 , H01L2224/16225 , H01L2224/73204 , H01L2224/73253 , H01L2924/15311 , H01L2924/16152
Abstract: An apparatus includes a circuit device, a heat sink fin, and a thermal interface material layer. The thermal interface material layer is thermally coupled to the circuit device and the heat sink fin. The thermal interface material layer includes a first alloy layer, a nanometal particle layer, and a second alloy layer. The first alloy layer is thermally coupled to the circuit device. The nanometal particle layer is thermally coupled to the first alloy layer. The nanometal particle layer includes nanometal particles and an intermediate mixture.
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