公开(公告)号：US20150162255A1

公开(公告)日：2015-06-11

申请号：US14620451

申请日：2015-02-12

Applicant: IBIDEN CO., LTD.

Inventor： Hiroyuki WATANABE ,  Masahiro KANEKO

IPC: H01L23/13 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/13 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/14 ,  H01L24/17 ,  H01L2224/11005 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor mounting device including a first substrate having insulation layers, conductor layers formed on the insulation layers, and via conductors connecting the conductor layers, a second substrate having insulation layers and conductor layers formed on the insulation layers of the second substrate, first bumps connecting the first substrate and the second substrate and formed on an outermost conductor layer of the first substrate formed on an outermost insulation layer of the first substrate, and second bumps positioned to mount a semiconductor element to the second substrate and formed on an outermost conductor layer of the second substrate formed on an outermost insulation layer of the second substrate. The second substrate has a thickness which is greater than a thickness of the first substrate.

Abstract translation: 一种半导体安装装置，包括具有绝缘层的第一基板，形成在所述绝缘层上的导体层和连接所述导体层的通孔导体，具有形成在所述第二基板的绝缘层上的绝缘层和导体层的第二基板， 所述第一基板和所述第二基板形成在形成在所述第一基板的最外绝缘层上的所述第一基板的最外导体层上，所述第二凸块被定位成将半导体元件安装到所述第二基板，并形成在所述第二基板的最外导体层 所述第二基板形成在所述第二基板的最外绝缘层上。 第二基板的厚度大于第一基板的厚度。

公开(公告)号：US20140113414A1

公开(公告)日：2014-04-24

申请号：US14141927

申请日：2013-12-27

Applicant: IBIDEN CO., LTD.

Inventor： Hiroyuki WATANABE ,  Masahiro Kaneko

IPC: H01L23/00 ,  H01L21/768

CPC classification number: H01L23/13 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/14 ,  H01L24/17 ,  H01L2224/11005 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor mounting device including a first substrate having first insulation layers, first conductor layers formed on the first insulation layers and via conductors connecting the first conductor layers, a second substrate having a core substrate, second conductor layers, through-hole conductors and buildup layers having second insulation layers and third conductor layers, first bumps connecting the first and second substrates and formed on the outermost first conductor layer on the outermost first insulation layer, and second bumps positioned to connect a semiconductor element and formed on the outermost third conductor layer on the outermost second insulation layer. The second substrate has greater thickness than the first substrate, the second conductor layers are formed on surfaces of the core substrate, respectively, the through-hole conductors are formed through the core substrate and connecting the second conductor layers, and the buildup layers are formed on the core substrate and second conductor layers, respectively.

Abstract translation: 一种半导体安装装置，包括具有第一绝缘层的第一基板，形成在第一绝缘层上的第一导体层和连接第一导体层的通孔导体，具有芯基板的第二基板，第二导体层，通孔导体和积层 具有第二绝缘层和第三导体层，第一凸块连接第一和第二基板并形成在最外部第一绝缘层上的最外面的第一导体层上，以及第二凸起，其被定位成连接半导体元件并形成在最外面的第三导体层上 最外层的第二绝缘层。 第二基板具有比第一基板更大的厚度，第二导体层分别形成在芯基板的表面上，通孔导体分别通过芯基板形成并连接第二导体层，并且形成积层 分别在芯基板和第二导体层上。

公开(公告)号：US20230069980A1

公开(公告)日：2023-03-09

申请号：US17822883

申请日：2022-08-29

Applicant: IBIDEN CO., LTD.

Inventor： Tomoyuki IKEDA ,  Keisuke SHIMIZU ,  Hiroyuki WATANABE

IPC: H05K3/38

Abstract: A method for manufacturing a wiring substrate includes forming a resin insulating layer on a first conductor layer such that the resin insulating layer covers the first conductor layer, applying a roughening treatment on a surface of the resin insulating layer on the opposite side with respect to the first conductor layer, forming an opening in the resin insulating layer after the roughening treatment on the surface of the resin insulating layer such that the opening penetrates through the resin insulating layer and exposes a portion of the first conductor layer, and forming a second conductor layer on the surface of the resin insulating layer such that the second conductor layer is formed in contact with the surface of the resin insulating layer and that a via conductor is formed in the opening of the resin insulating layer.

公开(公告)号：US20170256497A1

公开(公告)日：2017-09-07

申请号：US15449312

申请日：2017-03-03

Applicant: IBIDEN CO., LTD.

Inventor： Yasuhiko MANO ,  Hiroyuki WATANABE

IPC: H01L23/538 ,  H05K3/46 ,  H05K1/11 ,  H01L21/48 ,  H05K1/18

CPC classification number: H01L23/5389 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H05K1/115 ,  H05K1/183 ,  H05K3/4644

Abstract: An electronic component built-in substrate includes a first core layer having opening, a second core layer formed on the first core layer, a third core layer formed on the second core layer and having opening, a first electronic component accommodated in the opening of the first core layer, a second electronic component accommodated in the opening of the third core layer, and a first build-up structure formed on the first core layer on the opposite side of the second core layer such that the first build-up structure includes conductor layers and interlayer insulating layers, and a second build-up structure formed on the third core layer on the opposite side of the second core layer such that the second build-up structure includes conductor layers and interlayer insulating layers. The second core layer has rigidity which is higher than rigidity of the first core layer and rigidity of the third core layer.