公开(公告)号：US20250119153A1

公开(公告)日：2025-04-10

申请号：US18904738

申请日：2024-10-02

Applicant: IMEC VZW

Inventor： Ewout Martens ,  Anirudh Praveen Kankuppe Raghavendra Swamy ,  Angelo Parisi

IPC: H03M1/12 ,  H03M1/44

Abstract: A signal sampling circuitry comprises: a plurality of sampling units receiving an input signal for time-interleaved sampling, each sampling unit comprising: a sampling capacitor having a first plate connected to an output of the sampling unit; a first plate switch between the first plate and a first reference voltage, a second plate switch between a second plate of the sampling capacitor and a second reference voltage; an input buffer for outputting a buffered input signal to the second plate; wherein the input buffer is connected to at least one power gating switch for powering down the input buffer.