Tunnel field effect transistor and method for making thereof
    1.
    发明授权
    Tunnel field effect transistor and method for making thereof 有权
    隧道场效应晶体管及其制造方法

    公开(公告)号:US09318583B2

    公开(公告)日:2016-04-19

    申请号:US14289534

    申请日:2014-05-28

    Abstract: A vertical tunneling field effect transistor (TFET) and method for forming a vertical tunneling field effect transistor (TFET) is disclosed. The vertical tunneling field effect transistor TFET comprises a vertical core region, a vertical source region, a vertical drain region and a gate structure. The vertical core region is extending perpendicularly from a semiconductor substrate, having a top surface, consisting of a doped outer part and a middle part. The vertical source region of semiconducting core material comprises the doped outer part of the vertical core region. The vertical drain region of semiconducting drain material comprises along its longitudinal direction a first drain part and a second drain part, the first drain part either directly surrounding said vertical source region or directly sandwiching said vertical source region between two sub-parts of said first drain part, the second drain part located directly above and in contact with the first drain part. The gate structure comprises a gate dielectric layer directly aside of the first drain part of the vertical drain region and a gate layer directly aside of the gate dielectric layer. The second drain part is extending above the gate layer and gate dielectric layer. The vertical tunneling field effect transistor TFET further comprises a drain contact directly connected to a third drain part, the third drain part being an upper part of the second drain part of the vertical drain region. The vertical tunneling field effect transistor TFET further comprises a source contact electrically connected to the vertical source region. The vertical tunneling field effect transistor TFET further comprises a gate contact electrically connected to the gate layer.

    Abstract translation: 公开了用于形成垂直隧道场效应晶体管(TFET)的垂直隧道场效应晶体管(TFET)和方法。 垂直隧道场效应晶体管TFET包括垂直核心区域,垂直源区域,垂直漏极区域和栅极结构。 垂直芯区域从具有顶表面的半导体衬底垂直延伸,由掺杂的外部部分和中间部分组成。 半导体芯材料的垂直源区包括垂直芯区域的掺杂外部部分。 半导体漏极材料的垂直漏极区域沿着其纵向方向包括第一漏极部分和第二漏极部分,所述第一漏极部分直接围绕所述垂直源极区域或者直接将所述垂直源极区域夹在所述第一漏极的两个子部分之间 第二排水部分位于第一排水部分的正上方并与之接触。 栅极结构包括直接位于垂直漏极区的第一漏极部分的栅极电介质层和直接位于栅极介电层的栅极层。 第二漏极部分在栅极层和栅极介电层上方延伸。 垂直隧道场效应晶体管TFET还包括直接连接到第三漏极部分的漏极触点,第三漏极部分是垂直漏极区域的第二漏极部分的上部。 垂直隧道场效应晶体管TFET还包括电连接到垂直源极区的源极触点。 垂直隧道场效应晶体管TFET还包括电连接到栅极层的栅极接触。

    LAYERED STRUCTURE OF A P-TFET
    4.
    发明申请
    LAYERED STRUCTURE OF A P-TFET 审中-公开
    P-TFET的层状结构

    公开(公告)号:US20160104769A1

    公开(公告)日:2016-04-14

    申请号:US14880667

    申请日:2015-10-12

    Applicant: IMEC VZW

    Abstract: A p-type Tunnel Field-Effect Transistor comprises a drain p-type semiconductor region, a source n-type semiconductor region, and at least one gate stack. The source n-type semiconductor region comprises a lowly doped section with a length of at least 10 nm and with a doping level of n-type dopant elements below 5×1018 at/cm3 and, in contact with the lowly doped section, a highly doped section with a length between 1 monolayer and 20 nm and with a doping level of n-type dopant elements above 5×1018 at/cm3.

    Abstract translation: p型隧道场效应晶体管包括漏极p型半导体区域,源极n型半导体区域和至少一个栅极叠层。 源极n型半导体区域包括长度至少为10nm的低掺杂部分,并且n型掺杂元素的掺杂水平低于5×1018 at / cm 3,并且与低掺杂部分接触高度 掺杂部分的长度在1个单层和20纳米之间,并且n型掺杂元素的掺杂水平高于5×1018 at / cm3。

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