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    Non-self-aligned SiGe heterojunction bipolar transistor
    3.
    发明申请
    Non-self-aligned SiGe heterojunction bipolar transistor 审中-公开
    非自对准SiGe异质结双极晶体管

    公开(公告)号：US20020197807A1

    公开(公告)日：2002-12-26

    申请号：US09885792

    申请日：2001-06-20

    Applicant: International Business Machines Corporation

    Inventor： Basanth Jagannathan ,  Shwu-Jen Jeng ,  Jeffrey B. Johnson ,  Robb A. Johnson ,  Louis D. Lanzerotti ,  Kenneth J. Stein ,  Seshadri Subbanna

    IPC: H01L021/331 ,  H01L021/8222

    CPC classification number: H01L29/66242 ,  H01L21/8249 ,  H01L29/7378

    Abstract: A method for making a non-self-aligned, heterojunction bipolar transistor includes forming extrinsic base regions with a PFET source/drain implant aligned with the polysilicon in an emitter stack but which are not directly aligned with an emitter opening defined in that stack. This is achieved by making the emitter pedestal wider than the emitter opening. This advantageously removes the dependency of alignment between the extrinsic base regions and the emitter opening, thereby resulting in fewer process steps, reduced thermal cycles, and improved speed.

    Abstract translation: 用于制造非自对准异质结双极晶体管的方法包括：在发射极堆叠中与多晶硅对准的PFET源极/漏极注入形成非本征基极区域，但不直接对准在该叠层中限定的发射极开口。 这通过使发射器基座宽于发射器开口来实现。 这有利地消除了非本征基区和发射极开口之间的对准的依赖性，从而导致更少的工艺步骤，减少的热循环和改进的速度。

    Bipolar device having shallow junction raised extrinsic base and method for making the same
    5.
    发明申请
    Bipolar device having shallow junction raised extrinsic base and method for making the same 失效
    具有浅结的双极器件提出外在基极及其制造方法

    公开(公告)号：US20030057458A1

    公开(公告)日：2003-03-27

    申请号：US09962738

    申请日：2001-09-25

    Applicant: International Business Machines Corporation

    Inventor： Gregory G. Freeman ,  Seshadri Subbanna ,  Basanth Jagannathan ,  Kathryn T. Schonenberg ,  Shwu-Jen Jeng ,  Kenneth J. Stein ,  Jeffrey B. Johnson

    IPC: H01L029/80 ,  H01L031/112

    CPC classification number: H01L29/66242 ,  H01L29/1004 ,  H01L29/7378

    Abstract: A raised extrinsic base, silicon germanium (SiGe) heterojunction bipolar transistor (HBT), and a method of making the same is disclosed herein. The heterojunction bipolar transistor includes a substrate, a silicon germanium layer formed on the substrate, a collector layer formed on the substrate, a raised extrinsic base layer formed on the silicon germanium layer, and an emitter layer formed on the silicon germanium layer. The silicon germanium layer forms a heterojunction between the emitter layer and the raised extrinsic base layer. The bipolar transistor further includes a base electrode formed on a portion of the raised extrinsic base layer, a collector electrode formed on a portion of the collector layer, and an emitter electrode formed on a portion of the emitter layer. Thus, the heterojunction bipolar transistor includes a self-aligned raised extrinsic base, a minimal junction depth, and minimal interstitial defects influencing the base width, all being formed with minimal thermal processing. The heterojunction bipolar transistor simultaneously improves three factors that affect the speed and performance of bipolar transistors: base width, base resistance, and base-collector capacitance.

    Abstract translation: 本文公开了一种凸起的外在基极，硅锗（SiGe）异质结双极晶体管（HBT）及其制造方法。 异质结双极晶体管包括基板，形成在基板上的硅锗层，形成在基板上的集电极层，形成在硅锗层上的升高的非本征基极层和形成在硅锗层上的发射极层。 硅锗层在发射极层和凸起的非本征基极层之间形成异质结。 双极晶体管还包括形成在凸起的非本征基极层的一部分上的基极，在集电极层的一部分上形成的集电极，以及形成在发射极层的一部分上的发射极。 因此，异质结双极晶体管包括自对准凸起的外在基极，最小结深度以及影响基底宽度的最小间隙缺陷，全部以最小的热处理形成。 异质结双极晶体管同时改善了影响双极晶体管速度和性能的三个因素：基极宽度，基极电阻和基极集电极电容。

    Dual sidewall spacer for a self-aligned extrinsic base in SiGe heterojunction bipolar transistors
    6.
    发明申请
    Dual sidewall spacer for a self-aligned extrinsic base in SiGe heterojunction bipolar transistors 有权
    用于SiGe异质结双极晶体管中的自对准外基极的双侧壁间隔物

    公开(公告)号：US20020153535A1

    公开(公告)日：2002-10-24

    申请号：US09838417

    申请日：2001-04-19

    Applicant: International Business Machines Corporation

    Inventor： Gregory G. Freeman ,  David R. Greenberg ,  Shwu-Jen Jeng

    IPC: H01L031/0336

    CPC classification number: H01L29/66242 ,  H01L29/1004 ,  H01L29/7378

    Abstract: A method for forming a heterojunction bipolar transistor includes forming two sets of spacers on the sides of an emitter pedestal. After the first set of spacers is formed, first extrinsic base regions are implanted on either side of an intrinsic base. The second set of spacers is formed on the first set of spacers. Second extrinsic base regions are then implanted on respective sides of the intrinsic base. By using two sets of spacers, the first and second extrinsic base regions have different widths. This advantageously brings the combined extrinsic base structure closer to the emitter of the transistor but not closer to the collector. As a result, the base parasitic resistance is reduced along with collector-to-extrinsic base parasitic capacitance. The performance of the transistor is further enhanced as a result of the extrinsic base regions being self-aligned to the emitter and collector.

    Abstract translation: 用于形成异质结双极晶体管的方法包括在发射极基座的侧面上形成两组间隔物。 在形成第一组间隔物之后，将第一非本征基区植入在本征基底的任一侧上。 第二组间隔件形成在第一组间隔件上。 然后将第二非本征基区植入在本征基底的相应侧上。 通过使用两组间隔物，第一和第二非本征基区具有不同的宽度。 这有利地使组合的外部基极结构更靠近晶体管的发射极，但不更靠近集电极。 结果，基极寄生电阻随着集电极到非本征基极寄生电容而减小。 由于外部基极区域与发射极和集电极自对准，晶体管的性能进一步增强。

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