公开(公告)号：US10522438B2

公开(公告)日：2019-12-31

申请号：US15597124

申请日：2017-05-16

Applicant: Industrial Technology Research Institute

Inventor： Chun-Yi Cheng ,  Wei-Yuan Cheng ,  Shu-Wei Kuo ,  Yu-Jhen Yang

IPC: H01L23/31 ,  H01L21/02 ,  H01L21/48 ,  H01L21/768 ,  H01L23/00

Abstract: A package structure includes a redistribution layer, a chip, an encapsulant, a plurality of under ball release layers, and a plurality of solder balls. The redistribution layer includes a first surface, a second surface opposite to the first surface, and a patterned circuit layer, wherein the patterned circuit layer includes a plurality of pads protruding from the first surface. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface and encapsulates the chip. The under ball release layers cover the pads respectively. The solder balls are disposed on the under ball release layers and electrically connected to the pads.

公开(公告)号：US10573587B2

公开(公告)日：2020-02-25

申请号：US15673422

申请日：2017-08-10

Applicant: Industrial Technology Research Institute

Inventor： Shu-Wei Kuo ,  Chun-Yi Cheng ,  Wei-Yuan Cheng

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/683 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: A package structure includes a redistribution layer, a chip, an encapsulant, an under bump supporting layer, an attachment layer and solder balls. The redistribution layer includes a first surface, a second surface opposite to the first surface and a patterned circuit layer disposed on the first surface, wherein an outer surface of the patterned circuit layer and the first surface are coplanar. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface to encapsulate the chip. The under bump supporting layer is disposed on the first surface and includes openings for exposing the outer surface. The attachment layer covers the inner surface of each opening and the exposed portion of the patterned circuit layer. The solder balls are disposed in the openings respectively and electrically connected to the patterned circuit layer.

公开(公告)号：US20180122732A1

公开(公告)日：2018-05-03

申请号：US15673422

申请日：2017-08-10

Applicant: Industrial Technology Research Institute

Inventor： Shu-Wei Kuo ,  Chun-Yi Cheng ,  Wei-Yuan Cheng

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00

Abstract: A package structure includes a redistribution layer, a chip, an encapsulant, an under bump supporting layer, an attachment layer and solder balls. The redistribution layer includes a first surface, a second surface opposite to the first surface and a patterned circuit layer disposed on the first surface, wherein an outer surface of the patterned circuit layer and the first surface are coplanar. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface to encapsulate the chip. The under bump supporting layer is disposed on the first surface and includes openings for exposing the outer surface. The attachment layer covers the inner surface of each opening and the exposed portion of the patterned circuit layer. The solder balls are disposed in the openings respectively and electrically connected to the patterned circuit layer.

公开(公告)号：US20180122694A1

公开(公告)日：2018-05-03

申请号：US15597124

申请日：2017-05-16

Applicant: Industrial Technology Research Institute

Inventor： Chun-Yi Cheng ,  Wei-Yuan Cheng ,  Shu-Wei Kuo ,  Yu-Jhen Yang

IPC: H01L21/768 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H01L21/02

CPC classification number: H01L23/3107 ,  H01L21/02172 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76832 ,  H01L21/76838 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68359 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/16227 ,  H01L2224/81005 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/15311 ,  H01L2924/181

Abstract: A package structure includes a redistribution layer, a chip, an encapsulant, a plurality of under ball release layers, and a plurality of solder balls. The redistribution layer includes a first surface, a second surface opposite to the first surface, and a patterned circuit layer, wherein the patterned circuit layer includes a plurality of pads protruding from the first surface. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface and encapsulates the chip. The under ball release layers cover the pads respectively. The solder balls are disposed on the under ball release layers and electrically connected to the pads.