公开(公告)号：US09373564B2

公开(公告)日：2016-06-21

申请号：US14640028

申请日：2015-03-06

Applicant: Industrial Technology Research Institute

Inventor： Wen-Wei Shen ,  Kuan-Neng Chen ,  Cheng-Ta Ko

IPC: H01L29/40 ,  H01L23/48 ,  H01L21/768 ,  H01L25/065

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/0347 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/11002 ,  H01L2224/11462 ,  H01L2224/11602 ,  H01L2224/13009 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/16014 ,  H01L2224/16146 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device includes a substrate, a redistribution layer, a plurality of through-silicon vias (TSVs), and a plating seed layer. The substrate has a first surface and a second surface opposite to each other, and a plurality of cavities. The redistribution layer is disposed on the first surface, and the TSVs are respectively disposed in the cavities. The plating seed layer is disposed between the inner wall of each of the cavities and the corresponding TSVs. The anti-oxidation layer is disposed between the plating seed layer and the corresponding TSVs. The buffer layer covers the first surface and exposes the redistribution layers. Furthermore, a manufacturing method and a stacking structure of the semiconductor device are also provided.

Abstract translation: 半导体器件包括衬底，再分布层，多个穿硅通孔（TSV）和电镀种子层。 基板具有彼此相对的第一表面和第二表面，以及多个空腔。 再分配层设置在第一表面上，并且TSV分别设置在空腔中。 电镀种子层设置在每个空腔的内壁和相应的TSV之间。 抗氧化层设置在电镀种子层和相应的TSV之间。 缓冲层覆盖第一表面并暴露再分布层。 此外，还提供了半导体器件的制造方法和堆叠结构。

公开(公告)号：US20160043018A1

公开(公告)日：2016-02-11

申请号：US14640028

申请日：2015-03-06

Applicant: Industrial Technology Research Institute

Inventor： Wen-Wei Shen ,  Kuan-Neng Chen ,  Cheng-Ta Ko

IPC: H01L23/48 ,  H01L25/065 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/0347 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/11002 ,  H01L2224/11462 ,  H01L2224/11602 ,  H01L2224/13009 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/16014 ,  H01L2224/16146 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device includes a substrate, a redistribution layer, a plurality of through-silicon vias (TSVs), and a plating seed layer. The substrate has a first surface and a second surface opposite to each other, and a plurality of cavities. The redistribution layer is disposed on the first surface, and the TSVs are respectively disposed in the cavities. The plating seed layer is disposed between the inner wall of each of the cavities and the corresponding TSVs. The anti-oxidation layer is disposed between the plating seed layer and the corresponding TSVs. The buffer layer covers the first surface and exposes the redistribution layers. Furthermore, a manufacturing method and a stacking structure of the semiconductor device are also provided.

Abstract translation: 半导体器件包括衬底，再分布层，多个穿硅通孔（TSV）和电镀种子层。 基板具有彼此相对的第一表面和第二表面，以及多个空腔。 再分配层设置在第一表面上，并且TSV分别设置在空腔中。 电镀种子层设置在每个空腔的内壁和相应的TSV之间。 抗氧化层设置在电镀种子层和相应的TSV之间。 缓冲层覆盖第一表面并暴露再分布层。 此外，还提供了半导体器件的制造方法和堆叠结构。