公开(公告)号：US09543157B2

公开(公告)日：2017-01-10

申请号：US14501055

申请日：2014-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Michael Renner ,  Lothar Brencher

IPC: H01L21/302 ,  B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/30 ,  H01L21/02 ,  H01L21/3213

CPC classification number: H01L21/3065 ,  H01L21/0234 ,  H01L21/3003 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136

Abstract: According to various embodiments, a method for processing a carrier may include: performing a dry etch process in a processing chamber to remove a first material from the carrier by an etchant, the processing chamber including an exposed inner surface including aluminum and the etchant including a halogen; and, subsequently, performing a hydrogen plasma process in the processing chamber to remove a second material from at least one of the carrier or the inner surface of the processing chamber.

Abstract translation: 根据各种实施例，用于处理载体的方法可以包括：在处理室中执行干蚀刻工艺以通过蚀刻剂从载体去除第一材料，所述处理室包括暴露的包含铝的内表面，并且所述蚀刻剂包括 卤素; 以及随后在所述处理室中执行氢等离子体处理以从所述处理室的所述载体或内表面中的至少一个去除第二材料。

公开(公告)号：US20160093500A1

公开(公告)日：2016-03-31

申请号：US14501055

申请日：2014-09-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Michael Renner ,  Lothar Brencher

IPC: H01L21/3065 ,  H01L21/311

CPC classification number: H01L21/3065 ,  H01L21/0234 ,  H01L21/3003 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136

Abstract: According to various embodiments, a method for processing a carrier may include: performing a dry etch process in a processing chamber to remove a first material from the carrier by an etchant, the processing chamber including an exposed inner surface including aluminum and the etchant including a halogen; and, subsequently, performing a hydrogen plasma process in the processing chamber to remove a second material from at least one of the carrier or the inner surface of the processing chamber.

Abstract translation: 根据各种实施例，用于处理载体的方法可以包括：在处理室中执行干蚀刻工艺以通过蚀刻剂从载体去除第一材料，所述处理室包括暴露的包含铝的内表面，并且所述蚀刻剂包括 卤素; 以及随后在所述处理室中执行氢等离子体处理以从所述处理室的所述载体或内表面中的至少一个去除第二材料。

公开(公告)号：US09305798B2

公开(公告)日：2016-04-05

申请号：US13850206

申请日：2013-03-25

Applicant: Infineon Technologies AG

Inventor： Lothar Brencher ,  Dirk Meinhold ,  Michael Hartenberger ,  Georg Seidemann ,  Wolfgang Dickenscheid

IPC: H01L21/461 ,  H01L21/308 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L21/76832 ,  H01L21/3083 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76877

Abstract: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being is different from the second etchant.

Abstract translation: 一种用于蚀刻层组件的方法，所述层组件包括夹在蚀刻层和停止层之间的中间层，所述方法包括使用第一蚀刻剂蚀刻所述蚀刻层的步骤，以及使用第二蚀刻剂蚀刻所述中间层的步骤 蚀刻剂 第一蚀刻剂包括相对于蚀刻层和中间层至少5:1的第一蚀刻选择性。 第二蚀刻剂包括相对于中间层和停止层至少5:1的第二蚀刻选择性。 第一蚀刻剂与第二蚀刻剂不同。

公开(公告)号：US20130288481A1

公开(公告)日：2013-10-31

申请号：US13850206

申请日：2013-03-25

Applicant: Infineon Technologies AG

Inventor： Lothar Brencher ,  Dirk Meinhold ,  Michael Hartenberger ,  Georg Seidemann ,  Wolfgang Dickenscheid

IPC: H01L21/308

CPC classification number: H01L21/76832 ,  H01L21/3083 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76877

Abstract: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being is different from the second etchant.

Abstract translation: 一种用于蚀刻层组件的方法，所述层组件包括夹在蚀刻层和停止层之间的中间层，所述方法包括使用第一蚀刻剂蚀刻所述蚀刻层的步骤，以及使用第二蚀刻剂蚀刻所述中间层的步骤 蚀刻剂 第一蚀刻剂包括相对于蚀刻层和中间层至少5:1的第一蚀刻选择性。 第二蚀刻剂包括相对于中间层和停止层至少5:1的第二蚀刻选择性。 第一蚀刻剂与第二蚀刻剂不同。

公开(公告)号：US09082719B2

公开(公告)日：2015-07-14

申请号：US13656407

申请日：2012-10-19

Applicant: Infineon Technologies AG

Inventor： Lothar Brencher ,  Carsten Moritz

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01B13/00 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L21/31116 ,  H01L21/76831 ,  H01L21/76844 ,  H01L21/76898

Abstract: Embodiments provide a method for removing a dielectric layer from a bottom of a trench while maintaining the dielectric layer on sidewalls of the trench. The method includes etching the dielectric layer at the bottom of the trench and generating a passivation layer on the dielectric layer at an upper portion of the trench by adjusting the conditions of a plasma etch process to a first mode; and a step of etching the dielectric layer at the bottom of the trench and etching the passivation layer at the upper portion of the trench by adjusting the conditions of the plasma etch process to a second mode before the dielectric layer at the bottom of the trench is completely removed.

Abstract translation: 实施例提供了一种从沟槽的底部去除电介质层的方法，同时将电介质层保持在沟槽的侧壁上。 该方法包括蚀刻沟槽底部的电介质层，并通过将等离子体蚀刻工艺的条件调整到第一模式，在沟槽上部的电介质层上产生钝化层; 以及蚀刻沟槽底部的电介质层的步骤，并且通过在沟槽底部的电介质层之前将等离子体蚀刻工艺的条件调整到第二模式来蚀刻沟槽上部的钝化层 完全删除

公开(公告)号：US20160197009A1

公开(公告)日：2016-07-07

申请号：US15052676

申请日：2016-02-24

Applicant: Infineon Technologies AG

Inventor： Lothar Brencher ,  Dirk Meinhold ,  Michael Hartenberger ,  Georg Seidemann ,  Wolfgang Dickenscheid

IPC: H01L21/768

CPC classification number: H01L21/76832 ,  H01L21/3083 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76804 ,  H01L21/76877

Abstract: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being is different from the second etchant.

Abstract translation: 一种用于蚀刻层组件的方法，所述层组件包括夹在蚀刻层和停止层之间的中间层，所述方法包括使用第一蚀刻剂蚀刻所述蚀刻层的步骤，以及使用第二蚀刻剂蚀刻所述中间层的步骤 蚀刻剂 第一蚀刻剂包括相对于蚀刻层和中间层至少5:1的第一蚀刻选择性。 第二蚀刻剂包括相对于中间层和停止层至少5:1的第二蚀刻选择性。 第一蚀刻剂与第二蚀刻剂不同。

公开(公告)号：US20140110374A1

公开(公告)日：2014-04-24

申请号：US13656407

申请日：2012-10-19

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Lothar Brencher ,  Carsten Moritz

IPC: B44C1/22 ,  H05H1/24

CPC classification number: H01L21/31116 ,  H01L21/76831 ,  H01L21/76844 ,  H01L21/76898

Abstract: Embodiments provide a method for removing a dielectric layer from a bottom of a trench while maintaining the dielectric layer on sidewalls of the trench. The method includes etching the dielectric layer at the bottom of the trench and generating a passivation layer on the dielectric layer at an upper portion of the trench by adjusting the conditions of a plasma etch process to a first mode; and a step of etching the dielectric layer at the bottom of the trench and etching the passivation layer at the upper portion of the trench by adjusting the conditions of the plasma etch process to a second mode before the dielectric layer at the bottom of the trench is completely removed.

Abstract translation: 实施例提供了一种从沟槽的底部去除电介质层的方法，同时将电介质层保持在沟槽的侧壁上。 该方法包括：蚀刻沟槽底部的电介质层，并通过将等离子体蚀刻工艺的条件调整到第一模式，在沟槽上部的电介质层上产生钝化层; 以及蚀刻沟槽底部的电介质层的步骤，并且通过在沟槽底部的电介质层之前将等离子体蚀刻工艺的条件调整到第二模式来蚀刻沟槽上部的钝化层 完全删除