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公开(公告)号：US20170279425A1
公开(公告)日：2017-09-28
申请号：US15078199
申请日：2016-03-23
Applicant: Infineon Technologies AG
Inventor： Luca Valli , Benno Muehlbacher , Richard Gaggl
CPC classification number: H03G1/0088 , H03F3/45179 , H03F3/45475 , H03F2203/45138 , H03F2203/45222 , H03F2203/45512 , H03F2203/45522 , H03F2203/45528 , H03F2203/45534 , H03G3/3005
Abstract: A signal amplification method includes receiving, from a capacitive sensor, a first input signal by a first control terminal of a first transistor, and a second input signal by a first control terminal of a second transistor. The method also includes producing a first output signal, including amplifying a first signal at a first load path terminal of the first transistor using a first inverting amplifier having an output coupled to a resistance network, and producing a second output signal, including amplifying a second signal at a first load path terminal of the second transistor using a second inverting amplifier having an output coupled to the resistance network. The method also includes feeding back the first and second output signal to a second load path terminal of the first transistor and to a second load path terminal of the second transistor via the resistance network according to a pre-determined fraction.
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公开(公告)号：US20150181335A1
公开(公告)日：2015-06-25
申请号：US14137295
申请日：2013-12-20
Applicant: Infineon Technologies AG
Inventor： Wilfried Florian , Luca Valli , Richard Gaggl
IPC: H04R3/02
CPC classification number: H04R3/02 , H04R2201/003
Abstract: In accordance with an embodiment, a cancelation circuit includes a current mirror and a low pass filter. The current mirror includes an input terminal configured to accept an input current comprising a first noise signal, a first mirrored output and a second mirrored output. The low pass filter includes an input coupled to the first mirrored output and an output coupled to the second mirrored output. A sum of a current from the second mirrored output and a current of from the output of the low pass filter includes a phase-inverted version of the first noise signal.
Abstract translation: 根据实施例，消除电路包括电流镜和低通滤波器。 电流镜包括被配置为接受包括第一噪声信号，第一镜像输出和第二镜像输出的输入电流的输入端子。 低通滤波器包括耦合到第一镜像输出的输入和耦合到第二镜像输出的输出。 来自第二镜像输出的电流和来自低通滤波器的输出的电流之和包括第一噪声信号的相位反转版本。
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公开(公告)号：US20190123762A1
公开(公告)日：2019-04-25
申请号：US15790848
申请日：2017-10-23
Applicant: Infineon Technologies AG
Inventor： Elmar Bach , Dietmar Straeussnigg , Luca Valli
CPC classification number: H03M3/496 , H03H17/0416 , H03M3/32 , H03M3/368 , H03M3/414 , H03M3/458 , H03M3/498 , H04R3/00 , H04R2201/003
Abstract: In accordance with an embodiment, a digital microphone interface circuit includes a delta-sigma analog-to-digital converter (ADC) having an input configured to be coupled to a microphone, a digital lowpass filter coupled to an output of the delta-sigma ADC, and a digital sigma-delta modulator coupled to an output of the digital lowpass filter. The delta-sigma ADC, the digital lowpass filter, and the digital sigma-delta modulator are configured to operate at different sampling frequencies.
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公开(公告)号：US10250999B1
公开(公告)日：2019-04-02
申请号：US15706973
申请日：2017-09-18
Applicant: Infineon Technologies AG
Inventor： Francesco Polo , Richard Gaggl , Benno Muehlbacher , Luca Valli
Abstract: A circuit for biasing a MEMS microphone includes a first group of serially-coupled transistors coupled between a first node and a second node, a second group of serially-coupled transistors coupled between the first node and the second node, and a voltage divider circuit coupled to the second node having a number of outputs, a first group of outputs being coupled to corresponding control nodes associated with the first group of serially-coupled transistors, and a second group of outputs different from the first group of outputs coupled to corresponding control nodes associated with the second group of serially-coupled transistors, the control nodes being either bulk nodes or gate nodes.
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公开(公告)号：US20170318393A1
公开(公告)日：2017-11-02
申请号：US15142682
申请日：2016-04-29
Applicant: Infineon Technologies AG
Inventor： Luca Valli , Benno Muehlbacher , Richard Gaggl
CPC classification number: H04R19/005 , H02M3/07 , H03F3/183 , H03F3/187 , H03F3/45475 , H03F2200/03 , H03F2200/144 , H03F2203/45526 , H04R3/06 , H04R2201/003 , H04R2410/00 , H04R2410/03
Abstract: According to an embodiment, a circuit includes a high-Ω resistor including a plurality of semiconductor junction devices coupled in series and a plurality of additional capacitances formed in parallel with the plurality of semiconductor junction devices. Each semiconductor junction device of the plurality of semiconductor junction devices includes a parasitic doped well capacitance configured to insert a parasitic zero in a noise transfer function of the high-Ω resistor. Each additional capacitance of the plurality of additional capacitances is configured to adjust a parasitic pole in the noise transfer function of the high-Ω resistor in order to compensate for the parasitic zero.
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Patent Agency Ranking
公开(公告)号：US10348326B2
公开(公告)日：2019-07-09
申请号：US15790848
申请日：2017-10-23
Applicant: Infineon Technologies AG
Inventor： Elmar Bach , Dietmar Straeussnigg , Luca Valli
Abstract: In accordance with an embodiment, a digital microphone interface circuit includes a delta-sigma analog-to-digital converter (ADC) having an input configured to be coupled to a microphone, a digital lowpass filter coupled to an output of the delta-sigma ADC, and a digital sigma-delta modulator coupled to an output of the digital lowpass filter. The delta-sigma ADC, the digital lowpass filter, and the digital sigma-delta modulator are configured to operate at different sampling frequencies.
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公开(公告)号：US10171916B2
公开(公告)日：2019-01-01
申请号：US15142682
申请日：2016-04-29
Applicant: Infineon Technologies AG
Inventor： Luca Valli , Benno Muehlbacher , Richard Gaggl
Abstract: According to an embodiment, a circuit includes a high-Ω resistor including a plurality of semiconductor junction devices coupled in series and a plurality of additional capacitances formed in parallel with the plurality of semiconductor junction devices. Each semiconductor junction device of the plurality of semiconductor junction devices includes a parasitic doped well capacitance configured to insert a parasitic zero in a noise transfer function of the high-Ω resistor. Each additional capacitance of the plurality of additional capacitances is configured to adjust a parasitic pole in the noise transfer function of the high-Ω resistor in order to compensate for the parasitic zero.
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公开(公告)号：US09806687B2
公开(公告)日：2017-10-31
申请号：US15078199
申请日：2016-03-23
Applicant: Infineon Technologies AG
Inventor： Luca Valli , Benno Muehlbacher , Richard Gaggl
CPC classification number: H03G1/0088 , H03F3/45179 , H03F3/45475 , H03F2203/45138 , H03F2203/45222 , H03F2203/45512 , H03F2203/45522 , H03F2203/45528 , H03F2203/45534 , H03G3/3005
Abstract: A signal amplification method includes receiving, from a capacitive sensor, a first input signal by a first control terminal of a first transistor, and a second input signal by a first control terminal of a second transistor. The method also includes producing a first output signal, including amplifying a first signal at a first load path terminal of the first transistor using a first inverting amplifier having an output coupled to a resistance network, and producing a second output signal, including amplifying a second signal at a first load path terminal of the second transistor using a second inverting amplifier having an output coupled to the resistance network. The method also includes feeding back the first and second output signal to a second load path terminal of the first transistor and to a second load path terminal of the second transistor via the resistance network according to a pre-determined fraction.
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公开(公告)号：US20190090066A1
公开(公告)日：2019-03-21
申请号：US15706973
申请日：2017-09-18
Applicant: Infineon Technologies AG
Inventor： Francesco Polo , Richard Gaggl , Benno Muehlbacher , Luca Valli
Abstract: A circuit for biasing a MEMS microphone includes a first group of serially-coupled transistors coupled between a first node and a second node, a second group of serially-coupled transistors coupled between the first node and the second node, and a voltage divider circuit coupled to the second node having a number of outputs, a first group of outputs being coupled to corresponding control nodes associated with the first group of serially-coupled transistors, and a second group of outputs different from the first group of outputs coupled to corresponding control nodes associated with the second group of serially-coupled transistors, the control nodes being either bulk nodes or gate nodes.
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公开(公告)号：US09253569B2
公开(公告)日：2016-02-02
申请号：US14137295
申请日：2013-12-20
Applicant: Infineon Technologies AG
Inventor： Wilfried Florian , Luca Valli , Richard Gaggl
IPC: H04R3/02
CPC classification number: H04R3/02 , H04R2201/003
Abstract: In accordance with an embodiment, a cancelation circuit includes a current mirror and a low pass filter. The current mirror includes an input terminal configured to accept an input current comprising a first noise signal, a first mirrored output and a second mirrored output. The low pass filter includes an input coupled to the first mirrored output and an output coupled to the second mirrored output. A sum of a current from the second mirrored output and a current of from the output of the low pass filter includes a phase-inverted version of the first noise signal.
Abstract translation: 根据实施例，消除电路包括电流镜和低通滤波器。 电流镜包括被配置为接受包括第一噪声信号，第一镜像输出和第二镜像输出的输入电流的输入端子。 低通滤波器包括耦合到第一镜像输出的输入和耦合到第二镜像输出的输出。 来自第二镜像输出的电流和来自低通滤波器的输出的电流之和包括第一噪声信号的相位反转版本。
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