公开(公告)号：US20180240887A1

公开(公告)日：2018-08-23

申请号：US15895427

申请日：2018-02-13

Applicant: Infineon Technologies AG

Inventor： Matthias Koenig ,  Marco Kraus ,  Guenther Ruhl

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/16 ,  H01L29/10

CPC classification number: H01L29/66045 ,  H01L27/092 ,  H01L27/1203 ,  H01L29/0642 ,  H01L29/10 ,  H01L29/1083 ,  H01L29/1606 ,  H01L29/402 ,  H01L29/408 ,  H01L29/66037 ,  H01L29/66977 ,  H01L29/735 ,  H01L29/7391 ,  H01L29/778 ,  H01L29/861

Abstract: A method for use in manufacturing an electronic component comprises forming a layered structure comprising a dielectric structure layer, a channel layer and a gate layer. The dielectric structure layer comprises a first portion and a second portion that differ from one another in respect of fixed charges. The channel layer comprises a two-dimensional material. The gate layer comprises a gate formed above both, the first portion of the dielectric structure layer and the second portion of the dielectric structure layer. A device for use as an electronic component comprises a dielectric structure and a gate above the dielectric structure and a two-dimensional material between the dielectric structure and the gate. The dielectric structure is configured to expose the two-dimensional material to an inhomogeneous electric field.