公开(公告)号：US10354925B2

公开(公告)日：2019-07-16

申请号：US15278164

申请日：2016-09-28

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Werner Schwetlick

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/423 ,  H01L21/28 ,  H01L29/78 ,  H01L29/40 ,  H01L21/8238

Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface, first trenches and second trenches extending from the first surface into the semiconductor body, at least one lateral IGFET including a first load terminal at the first surface, a second load terminal at the first surface and a gate electrode within the first trenches, and at least one vertical IGFET including a first load terminal at the first surface, a second load terminal at the second surface and a gate electrode within the second trenches. The first trenches extend from the first surface into the semiconductor body deeper than a channel zone of the lateral IGFET and confine the channel zone.

公开(公告)号：US09461164B2

公开(公告)日：2016-10-04

申请号：US14027683

申请日：2013-09-16

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Werner Schwetlick

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/40

CPC classification number: H01L21/823487 ,  H01L21/28008 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7851

Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. The semiconductor device further includes first and second trenches extending from the first surface into the semiconductor body. The semiconductor device further includes at least one lateral IGFET including a first load terminal at the first surface, a second load terminal at the first surface and a gate electrode within the first trenches. The semiconductor device further includes at least one vertical IGFET including a first load terminal at the first surface, a second load terminal at the second surface and a gate electrode within the second trenches.

Abstract translation: 半导体器件包括具有第一表面和与第一表面相对的第二表面的半导体本体。 半导体器件还包括从第一表面延伸到半导体本体的第一和第二沟槽。 半导体器件还包括至少一个横向IGFET，其包括第一表面处的第一负载端子，第一表面处的第二负载端子和第一沟槽内的栅电极。 半导体器件还包括至少一个垂直IGFET，其包括第一表面处的第一负载端子，第二表面处的第二负载端子和第二沟槽内的栅电极。

公开(公告)号：US20150076591A1

公开(公告)日：2015-03-19

申请号：US14027683

申请日：2013-09-16

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Werner Schwetlick

IPC: H01L29/78 ,  H01L21/28

CPC classification number: H01L21/823487 ,  H01L21/28008 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7851

Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. The semiconductor device further includes first and second trenches extending from the first surface into the semiconductor body. The semiconductor device further includes at least one lateral IGFET including a first load terminal at the first surface, a second load terminal at the first surface and a gate electrode within the first trenches. The semiconductor device further includes at least one vertical IGFET including a first load terminal at the first surface, a second load terminal at the second surface and a gate electrode within the second trenches.

Abstract translation: 半导体器件包括具有第一表面和与第一表面相对的第二表面的半导体本体。 半导体器件还包括从第一表面延伸到半导体本体的第一和第二沟槽。 半导体器件还包括至少一个横向IGFET，其包括第一表面处的第一负载端子，第一表面处的第二负载端子和第一沟槽内的栅电极。 半导体器件还包括至少一个垂直IGFET，其包括第一表面处的第一负载端子，第二表面处的第二负载端子和第二沟槽内的栅电极。

公开(公告)号：US20160351668A1

公开(公告)日：2016-12-01

申请号：US15166957

申请日：2016-05-27

Applicant: Infineon Technologies AG

Inventor： Werner Schwetlick ,  Robert Zink

IPC: H01L29/40 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78

CPC classification number: H01L29/407 ,  H01L27/0922 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/408 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/739 ,  H01L29/7397 ,  H01L29/7813

Abstract: A semiconductor device includes a stripe-shaped electrode structure that extends from a first surface into a semiconductor portion. The electrode structure includes a main portion and an end portion terminating the electrode structure. The main portion includes a field electrode and a first portion of a field dielectric separating the field electrode from the semiconductor portion. The end portion includes a filled section in which a second portion of the field dielectric extends from a first side of the electrode structure to an opposite second side. The filled section is narrower than the main portion and a length of the filled section along a longitudinal axis of the electrode structure is at least 150% of a first layer thickness of the first portion of the field dielectric.

Abstract translation: 半导体器件包括从第一表面延伸到半导体部分的条形电极结构。 电极结构包括主体部分和终止电极结构的端部部分。 主要部分包括场电极和将场电极与半导体部分分离的场介质的第一部分。 端部包括填充部分，其中场电介质的第二部分从电极结构的第一侧延伸到相对的第二侧。 填充部分比主要部分窄，并且沿着电极结构的纵向轴线的填充部分的长度为场电介质的第一部分的第一层厚度的至少150％。

公开(公告)号：US09837498B2

公开(公告)日：2017-12-05

申请号：US15166957

申请日：2016-05-27

Applicant: Infineon Technologies AG

Inventor： Werner Schwetlick ,  Robert Zink

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L29/423 ,  H01L29/10 ,  H01L29/78 ,  H01L29/06 ,  H01L27/092

CPC classification number: H01L29/407 ,  H01L27/0922 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/408 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/739 ,  H01L29/7397 ,  H01L29/7813

Abstract: A semiconductor device includes a stripe-shaped electrode structure that extends from a first surface into a semiconductor portion. The electrode structure includes a main portion and an end portion terminating the electrode structure. The main portion includes a field electrode and a first portion of a field dielectric separating the field electrode from the semiconductor portion. The end portion includes a filled section in which a second portion of the field dielectric extends from a first side of the electrode structure to an opposite second side. The filled section is narrower than the main portion and a length of the filled section along a longitudinal axis of the electrode structure is at least 150% of a first layer thickness of the first portion of the field dielectric.

公开(公告)号：US20170018461A1

公开(公告)日：2017-01-19

申请号：US15278164

申请日：2016-09-28

Applicant: Infineon Technologies AG

Inventor： Thorsten Meyer ,  Werner Schwetlick

IPC: H01L21/8234 ,  H01L29/423 ,  H01L27/088

CPC classification number: H01L21/823487 ,  H01L21/28008 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7851

Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface, first trenches and second trenches extending from the first surface into the semiconductor body, at least one lateral IGFET including a first load terminal at the first surface, a second load terminal at the first surface and a gate electrode within the first trenches, and at least one vertical IGFET including a first load terminal at the first surface, a second load terminal at the second surface and a gate electrode within the second trenches. The first trenches extend from the first surface into the semiconductor body deeper than a channel zone of the lateral IGFET and confine the channel zone.

Abstract translation: 半导体器件包括具有第一表面和与第一表面相对的第二表面的半导体本体，第一沟槽和第二沟槽从第一表面延伸到半导体本体中，至少一个横向IGFET，其包括在第一表面处的第一负载端子 ，第一表面处的第二负载端子和第一沟槽内的栅电极，以及包括第一表面处的第一负载端子，第二表面处的第二负载端子和第二沟槽内的栅电极的至少一个垂直IGFET 。 第一沟槽从第一表面延伸到比外侧IGFET的沟道区更深的半导体本体，并限制沟道区。

公开(公告)号：US08710575B1

公开(公告)日：2014-04-29

申请号：US13754997

申请日：2013-01-31

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Werner Schwetlick

IPC: H01L29/788 ,  H01L21/336 ,  H01L27/115 ,  H01L29/423

CPC classification number: H01L29/66825 ,  G11C16/0425 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/66787 ,  H01L29/7883 ,  H01L29/7889

Abstract: A semiconductor device is formed in a semiconductor substrate comprising a first main surface and includes a control gate disposed in a lower portion of a first trench formed in the first main surface, a floating gate disposed in the first trench above the control gate and insulated from the control gate, a source region of a first conductivity type, a body region of a second conductivity type, and a drain region of the first conductivity type.

Abstract translation: 半导体器件形成在包括第一主表面的半导体衬底中，并且包括设置在形成在第一主表面中的第一沟槽的下部的控制栅极，设置在控制栅极上方的第一沟槽中的浮置栅极 控制栅极，第一导电类型的源极区域，第二导电类型的体区域和第一导电类型的漏极区域。