公开(公告)号：US20140264779A1

公开(公告)日：2014-09-18

申请号：US14185272

申请日：2014-02-20

Applicant: Infineon Technologies Austria AG

Inventor： Kae-Horng Wang ,  Francisco Javier Santos Rodriguez ,  Michael Knabl ,  Guenther Koffler

IPC: H01L21/3213 ,  H01L21/67 ,  H01L23/00

CPC classification number: H01L21/02274 ,  C23C16/34 ,  C23C16/40 ,  C23C16/50 ,  C23C18/1619 ,  G03F7/16 ,  G03F7/20 ,  G03F7/26 ,  H01J37/32889 ,  H01J2237/3321 ,  H01L21/02035 ,  H01L21/02038 ,  H01L21/288 ,  H01L21/31144 ,  H01L21/6715 ,  H01L21/67225 ,  H01L21/6723 ,  H01L23/485 ,  H01L23/564 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various techniques, methods, devices and apparatus are provided where an isolation layer is provided at a peripheral region of the substrate, and one or more metal layers are deposited onto the substrate.

Abstract translation: 提供各种技术，方法，装置和装置，其中隔离层设置在基板的周边区域，并且一个或多个金属层沉积在基板上。

公开(公告)号：US20240304600A1

公开(公告)日：2024-09-12

申请号：US18596213

申请日：2024-03-05

Applicant: Infineon Technologies Austria AG

Inventor： Shalini Jakanadan ,  Guenther Koffler ,  Huat Chye Lim ,  Seng Yeong Ooi

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/14 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L23/14 ,  H01L24/80 ,  H01L25/18 ,  H01L2224/80411 ,  H01L2224/80416 ,  H01L2224/80455 ,  H01L2224/8082 ,  H01L2924/1203 ,  H01L2924/13055

Abstract: A method for fabricating a semiconductor device includes: providing a substrate layer stack including a substrate with a metallic upper surface, a first Ni containing layer disposed on the substrate, and a first Sn layer on the first Ni containing layer; depositing a first semiconductor layer stack on the first Sn layer and that includes a first NiP layer, a first semiconductor die disposed on the first NiP layer, and a second NiP layer disposed on the first semiconductor die; depositing a second semiconductor layer stack on the first semiconductor layer stack and that includes a second Sn layer, a second Ni containing layer disposed on the second Sn layer, and a second semiconductor die disposed on the second Ni containing layer; and performing a diffusion soldering process for connecting the first semiconductor layer stack to the substrate and the second semiconductor layer stack to the first semiconductor layer stack.

公开(公告)号：US09698106B2

公开(公告)日：2017-07-04

申请号：US15073551

申请日：2016-03-17

Applicant: Infineon Technologies Austria AG

Inventor： Kae-Horng Wang ,  Francisco Javier Santos Rodriguez ,  Michael Knabl ,  Guenther Koffler

IPC: H01L21/67 ,  H01L23/00 ,  H01L21/02 ,  C23C16/34 ,  C23C16/40 ,  C23C16/50 ,  C23C18/16 ,  G03F7/16 ,  G03F7/20 ,  G03F7/26 ,  H01J37/32 ,  H01L21/311 ,  H01L21/288 ,  H01L23/485 ,  H01L27/146

CPC classification number: H01L21/02274 ,  C23C16/34 ,  C23C16/40 ,  C23C16/50 ,  C23C18/1619 ,  G03F7/16 ,  G03F7/20 ,  G03F7/26 ,  H01J37/32889 ,  H01J2237/3321 ,  H01L21/02035 ,  H01L21/02038 ,  H01L21/288 ,  H01L21/31144 ,  H01L21/6715 ,  H01L21/67225 ,  H01L21/6723 ,  H01L23/485 ,  H01L23/564 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various techniques, methods, devices and apparatus are provided where an isolation layer is provided at a peripheral region of the substrate, and one or more metal layers are deposited onto the substrate.

公开(公告)号：US20160203979A1

公开(公告)日：2016-07-14

申请号：US15073551

申请日：2016-03-17

Applicant: Infineon Technologies Austria AG

Inventor： Kae-Horng Wang ,  Francisco Javier Santos Rodriguez ,  Michael Knabl ,  Guenther Koffler

IPC: H01L21/02 ,  H01L21/288 ,  H01L21/67 ,  H01J37/32 ,  G03F7/26 ,  C23C16/40 ,  C23C16/34 ,  C23C16/50 ,  G03F7/16 ,  G03F7/20 ,  H01L21/311 ,  C23C18/16

CPC classification number: H01L21/02274 ,  C23C16/34 ,  C23C16/40 ,  C23C16/50 ,  C23C18/1619 ,  G03F7/16 ,  G03F7/20 ,  G03F7/26 ,  H01J37/32889 ,  H01J2237/3321 ,  H01L21/02035 ,  H01L21/02038 ,  H01L21/288 ,  H01L21/31144 ,  H01L21/6715 ,  H01L21/67225 ,  H01L21/6723 ,  H01L23/485 ,  H01L23/564 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various techniques, methods, devices and apparatus are provided where an isolation layer is provided at a peripheral region of the substrate, and one or more metal layers are deposited onto the substrate.

Abstract translation: 提供各种技术，方法，装置和装置，其中隔离层设置在基板的周边区域，并且一个或多个金属层沉积在基板上。

公开(公告)号：US09318446B2

公开(公告)日：2016-04-19

申请号：US14185272

申请日：2014-02-20

Applicant: Infineon Technologies Austria AG

Inventor： Kae-Horng Wang ,  Francisco Javier Santos Rodriguez ,  Michael Knabl ,  Guenther Koffler

IPC: H01L21/304 ,  H01L21/311 ,  H01L23/00 ,  H01L21/288 ,  H01L23/485 ,  H01L27/146 ,  H01L21/02

CPC classification number: H01L21/02274 ,  C23C16/34 ,  C23C16/40 ,  C23C16/50 ,  C23C18/1619 ,  G03F7/16 ,  G03F7/20 ,  G03F7/26 ,  H01J37/32889 ,  H01J2237/3321 ,  H01L21/02035 ,  H01L21/02038 ,  H01L21/288 ,  H01L21/31144 ,  H01L21/6715 ,  H01L21/67225 ,  H01L21/6723 ,  H01L23/485 ,  H01L23/564 ,  H01L27/14683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various techniques, methods, devices and apparatus are provided where an isolation layer is provided at a peripheral region of the substrate, and one or more metal layers are deposited onto the substrate.

Abstract translation: 提供各种技术，方法，装置和装置，其中隔离层设置在基板的周边区域，并且一个或多个金属层沉积在基板上。