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公开(公告)号:US20190042095A1
公开(公告)日:2019-02-07
申请号:US16111156
申请日:2018-08-23
Applicant: Intel Corporation
Inventor: George VERGIS , Bill NALE , Derek A. THOMPSON , James A. McCALL , Rajat AGARWAL , Wei P. CHEN
IPC: G06F3/06
Abstract: An apparatus is described. The apparatus includes a memory controller having register space to inform the memory controller that the memory controller is coupled to a memory module that conforms to a first memory chip industry standard specification but is composed of memory chips that conform to a second, different memory chip industry standard specification.