公开(公告)号：US20190044293A1

公开(公告)日：2019-02-07

申请号：US15952741

申请日：2018-04-13

Applicant: Intel Corporation

Inventor： Dirk Blevins ,  Gene F. Young ,  Sudeep Puligundla ,  Todd Langley ,  Kevin Bross ,  Nagabhushan Chitlur

IPC: H01R27/02 ,  H01R12/70 ,  H05K1/11 ,  H05K7/14

Abstract: Apparatuses and systems associated with expansion card design with a coherent connector to provide for coherent communication are disclosed herein. In embodiments, a circuit card may comprise an integrated circuit (IC), a first connector to couple the IC to a processor of a computer device, the first connector to provide for non-coherent communication between the IC and the processor, and a second connector to couple the IC to the processor, the second connector to provide for coherent communication between the IC and the processor. Other embodiments may be described and/or claimed.

公开(公告)号：US11251576B2

公开(公告)日：2022-02-15

申请号：US15952741

申请日：2018-04-13

Applicant: Intel Corporation

Inventor： Dirk Blevins ,  Gene F. Young ,  Sudeep Puligundla ,  Todd Langley ,  Kevin Bross ,  Nagabhushan Chitlur

IPC: H01R27/02 ,  H01R12/70 ,  H05K1/11 ,  H05K7/14 ,  H05K1/14 ,  H01R12/73

Abstract: Apparatuses and systems associated with expansion card design with a coherent connector to provide for coherent communication are disclosed herein. In embodiments, a circuit card may comprise an integrated circuit (IC), a first connector to couple the IC to a processor of a computer device, the first connector to provide for non-coherent communication between the IC and the processor, and a second connector to couple the IC to the processor, the second connector to provide for coherent communication between the IC and the processor. Other embodiments may be described and/or claimed.

公开(公告)号：US20190034372A1

公开(公告)日：2019-01-31

申请号：US15843201

申请日：2017-12-15

Applicant: Intel Corporation

Inventor： Dirk Blevins ,  Kevin Devey ,  Todd Cameron Langley

IPC: G06F13/40 ,  G06F13/16 ,  G06F13/42

Abstract: Techniques are provided for multiple device Peripheral Component Interface Express (PCIe) card having a single slot connector and each device interfaces with the single slot connector using distinct, unshared, data lane terminals of the single slot connector. In an example, a PCIe card can include a first device mounted to a circuit board and a second device mounted to the circuit board. The first device can be connected to a first plurality of data lane terminals of a single slot connector of the circuit board. The second device can be connected to a second plurality of data lane terminals of the single slot connector. The first plurality of data lane terminals can be distinct from the second plurality of data lane terminals.