公开(公告)号：US09406618B2

公开(公告)日：2016-08-02

申请号：US14305439

申请日：2014-06-16

Applicant: Intel Corporation

Inventor： John S. Guzek ,  Ravi K. Nalla ,  Javier Solo Gonzalez ,  Drew Delaney ,  Suresh Pothukuchi ,  Mohit Mamodia ,  Edward Zarbock ,  Johanna M. Swan

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/48 ,  H01L23/00 ,  H01L25/03 ,  H01L25/065 ,  H01L25/18

CPC classification number: H01L23/5384 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/48137 ,  H01L2224/48472 ,  H01L2224/73259 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a subsequent die that is coupled to the TSV die and that is disposed above the coreless substrate.

Abstract translation: 一种装置包括具有与无芯基板成一体的贯通硅通孔（TSV）嵌入管芯的无芯基板。 该设备包括连接到TSV管芯并且设置在无芯基板之上的后续管芯。