公开(公告)号：US11792446B2

公开(公告)日：2023-10-17

申请号：US17091865

申请日：2020-11-06

Applicant: Intel Corporation

Inventor： Satheesh Chellappan ,  Kishore Kasichainula ,  Frank Baehren

IPC: G06F17/00 ,  H04N21/233 ,  G06F9/30 ,  H04L65/80 ,  H04L65/75

CPC classification number: H04N21/233 ,  G06F9/30003 ,  H04L65/75 ,  H04L65/80

Abstract: Example methods, apparatus, systems and articles of manufacture to reduce audio streaming latency between audio and Gigabit Ethernet subsystems are disclosed herein. An example integrated circuit disclosed herein to process an audio stream associated with an endpoint device on a network includes an Ethernet subsystem to access the network and an audio subsystem to process audio data associated with the audio stream. The disclosed example integrated circuit also includes a direct hardware path between the Ethernet subsystem and the audio subsystem to exchange audio data between the Ethernet subsystem and the audio subsystem without the audio data being processed by a first software driver that is to provide access to the Ethernet subsystem or a second software driver that is to provide access to the audio subsystem.

公开(公告)号：US12301471B2

公开(公告)日：2025-05-13

申请号：US17853562

申请日：2022-06-29

Applicant: Intel Corporation

Inventor： Kishore Kasichainula ,  Hector Blanco Alcaine ,  Frank Baehren

IPC: H04L47/56 ,  H04L47/2441 ,  H04L47/30

Abstract: The present disclosure provides techniques for controlling transmissions in time-sensitive networks (TSNs) and/or for time-sensitive applications (TSAs), including techniques for providing low latency and scalable gate control for TSNs and TSAs, configuring multiple TSAs to share the same physical network link, and enabling TSNs/TSAs to utilize Energy Efficient Ethernet (EEE) mechanisms.

公开(公告)号：US20210266610A1

公开(公告)日：2021-08-26

申请号：US17091865

申请日：2020-11-06

Applicant: Intel Corporation

Inventor： Satheesh Chellappan ,  Kishore Kasichainula ,  Frank Baehren

IPC: H04N21/233 ,  G06F9/30 ,  H04L29/06

Abstract: Example methods, apparatus, systems and articles of manufacture to reduce audio streaming latency between audio and Gigabit Ethernet subsystems are disclosed herein. An example integrated circuit disclosed herein to process an audio stream associated with an endpoint device on a network includes an Ethernet subsystem to access the network and an audio subsystem to process audio data associated with the audio stream. The disclosed example integrated circuit also includes a direct hardware path between the Ethernet subsystem and the audio subsystem to exchange audio data between the Ethernet subsystem and the audio subsystem without the audio data being processed by a first software driver that is to provide access to the Ethernet subsystem or a second software driver that is to provide access to the audio subsystem.

公开(公告)号：US10834434B2

公开(公告)日：2020-11-10

申请号：US16235934

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Satheesh Chellappan ,  Kishore Kasichainula ,  Frank Baehren

IPC: G06F17/00 ,  H04N21/233 ,  G06F9/30 ,  H04L29/06

Abstract: Example methods, apparatus, systems and articles of manufacture to reduce audio streaming latency between audio and Gigabit Ethernet subsystems are disclosed herein. An example integrated circuit disclosed herein to process an audio stream associated with an endpoint device on a network includes an Ethernet subsystem to access the network and an audio subsystem to process audio data associated with the audio stream. The disclosed example integrated circuit also includes a direct hardware path between the Ethernet subsystem and the audio subsystem to exchange audio data between the Ethernet subsystem and the audio subsystem without the audio data being processed by a first software driver that is to provide access to the Ethernet subsystem or a second software driver that is to provide access to the audio subsystem.

公开(公告)号：US20220345417A1

公开(公告)日：2022-10-27

申请号：US17853562

申请日：2022-06-29

Applicant: Intel Corporation

Inventor： Kishore Kasichainula ,  Hector Blanco Alcaine ,  Frank Baehren

IPC: H04L47/56 ,  H04L47/2441 ,  H04L47/30

Abstract: The present disclosure provides techniques for controlling transmissions in time-sensitive networks (TSNs) and/or for time-sensitive applications (TSAs), including techniques for providing low latency and scalable gate control for TSNs and TSAs, configuring multiple TSAs to share the same physical network link, and enabling TSNs/TSAs to utilize Energy Efficient Ethernet (EEE) mechanisms.