公开(公告)号：US20190154739A1

公开(公告)日：2019-05-23

申请号：US16254468

申请日：2019-01-22

Applicant: Intel Corporation

Inventor： Gerhard SCHROM ,  J. Keith HODGSON ,  Alexander LYAKHOV ,  Chiu Keung TANG ,  Narayanan RAGHURAMAN ,  Narayanan NATARAJAN

IPC: G01R19/00 ,  H02M3/156 ,  H03L5/00 ,  H03M1/66 ,  H02M3/158 ,  H02M1/088 ,  H02M3/157 ,  G06T3/40

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

公开(公告)号：US20180096764A1

公开(公告)日：2018-04-05

申请号：US15283350

申请日：2016-10-01

Applicant: Intel Corporation

Inventor： Donald S. GARDNER ,  Gerhard SCHROM ,  Edward A. BURTON

IPC: H01F1/147 ,  H01F27/255 ,  H01F10/06 ,  H01F27/28 ,  H01F41/04 ,  H01F41/16 ,  H01F41/26 ,  H01F41/32 ,  H05K3/00 ,  H01L23/64 ,  H01L49/02 ,  H01L25/18

CPC classification number: H01F1/14733 ,  H01F10/06 ,  H01F17/0006 ,  H01F27/255 ,  H01F27/2804 ,  H01F27/365 ,  H01F41/041 ,  H01F41/046 ,  H01F41/16 ,  H01F41/18 ,  H01F41/26 ,  H01F41/32 ,  H01F2017/0066 ,  H01L23/552 ,  H01L23/645 ,  H01L25/18 ,  H01L28/10 ,  H05K1/165 ,  H05K3/0085 ,  H05K2201/086 ,  H05K2201/09236

Abstract: Embodiments are generally directed to hybrid magnetic material structures for electronic devices and circuits. An embodiment of an inductor includes a first layer of magnetic film material applied on a substrate, one or more conductors placed on the first layer of magnetic film material, and a second layer of magnetic particles, wherein the magnetic particles are suspended in an insulating medium.

公开(公告)号：US20200264214A1

公开(公告)日：2020-08-20

申请号：US16866347

申请日：2020-05-04

Applicant: Intel Corporation

Inventor： Gerhard SCHROM ,  J. Keith HODGSON ,  Alexander LYAKHOV ,  Chiu Keung TANG ,  Narayanan RAGHURAMAN ,  Narayanan NATARAJAN

IPC: G01R19/00 ,  H02M3/158 ,  H02M1/088 ,  G06T3/40 ,  H03M1/66 ,  H03L5/00 ,  H02M3/156 ,  H02M3/157

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

公开(公告)号：US20190006334A1

公开(公告)日：2019-01-03

申请号：US16060658

申请日：2015-12-26

Applicant: Intel Corporation

Inventor： Donald S. GARDNER ,  Edward A. BURTON ,  Gerhard SCHROM ,  Larry E. MOSLEY

IPC: H01L25/16 ,  H01L49/02 ,  H01L29/20 ,  H01L23/498 ,  H01L21/50 ,  H01L23/00

Abstract: Embodiments are generally directed to integrated passive devices on chip. An embodiment of a device includes a semiconductor die; a semiconductor die package, a first side of the package being coupled with the semiconductor die; and one or more separate dies to provide passive components for operation of the semiconductor die, wherein the passive components for operation of the semiconductor die includes inductors.