公开(公告)号：US20180376591A1

公开(公告)日：2018-12-27

申请号：US16118990

申请日：2018-08-31

Applicant: Intel Corporation

Inventor： Yoshihiro TOMITA ,  Joshua D. HEPPNER ,  Shawna M. LIFF ,  Pramod MALATKAR

IPC: H05K1/03 ,  H05K3/00 ,  A41D13/00 ,  A43B1/00 ,  A43B3/00 ,  H05K1/11 ,  H05K1/18 ,  H05K3/32 ,  A41D1/00

Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing a magnetic particle embedded flexible substrate, a printed flexible substrate for a magnetic tray, or an electro-magnetic carrier for magnetized or ferromagnetic flexible substrates. For instance, in accordance with one embodiment, there are means disclosed for fabricating a flexible substrate having one or more electrical interconnects to couple with leads of an electrical device; integrating magnetic particles or ferromagnetic particles into the flexible substrate; supporting the flexible substrate with a carrier plate during one or more manufacturing processes for the flexible substrate, in which the flexible substrate is held flat against the carrier plate by an attractive magnetic force between the magnetic particles or ferromagnetic particles integrated with the flexible substrate and a complementary magnetic attraction of the carrier plate; and removing the flexible substrate from the carrier plate subsequent to completion of the one or more manufacturing processes for the flexible substrate. Other related embodiments are disclosed.

公开(公告)号：US20240213171A1

公开(公告)日：2024-06-27

申请号：US18596488

申请日：2024-03-05

Applicant: Intel Corporation

Inventor： Tomita YOSHIHIRO ,  Eric J. LI ,  Shawna M. LIFF ,  Javier A. FALCON ,  Joshua D. HEPPNER

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/552 ,  H01L25/04 ,  H01L25/065 ,  H01L25/07 ,  H01L25/075 ,  H01L25/11 ,  H01L25/16

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/19 ,  H01L24/48 ,  H01L24/96 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/16 ,  H01L24/16 ,  H01L25/042 ,  H01L25/071 ,  H01L25/072 ,  H01L25/0753 ,  H01L25/112 ,  H01L25/115 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/81024 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/1304 ,  H01L2924/1436 ,  H01L2924/15192 ,  H01L2924/181 ,  H01L2924/1815

Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.

公开(公告)号：US20180337135A1

公开(公告)日：2018-11-22

申请号：US15776773

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Tomita YOSHIHIRO ,  Eric J. LI ,  Shawna M. LIFF ,  Javier A. FALCON ,  Joshua D. HEPPNER

IPC: H01L23/538 ,  H01L23/31 ,  H01L25/065 ,  H01L23/552 ,  H01L25/16 ,  H01L23/498 ,  H01L23/13 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48

Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.

公开(公告)号：US20220344273A1

公开(公告)日：2022-10-27

申请号：US17861125

申请日：2022-07-08

Applicant: Intel Corporation

Inventor： Toshihiro TOMITA ,  Eric J. LI ,  Shawna M. LIFF ,  Javier A. FALCON ,  Joshua D. HEPPNER

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/04 ,  H01L23/48 ,  H01L21/48 ,  H01L21/56 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065 ,  H01L25/16

Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.

公开(公告)号：US20200286834A1

公开(公告)日：2020-09-10

申请号：US16879318

申请日：2020-05-20

Applicant: Intel Corporation

Inventor： Tomita YOSHIHIRO ,  Eric J. LI ,  Shawna M. LIFF ,  Javier A. FALCON ,  Joshua D. HEPPNER

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/04 ,  H01L23/48 ,  H01L21/48 ,  H01L21/56 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065 ,  H01L25/16

Abstract: Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.