公开(公告)号：US10739844B2

公开(公告)日：2020-08-11

申请号：US15969198

申请日：2018-05-02

Applicant: Intel Corporation

Inventor： Chee Lim Nge ,  James G. Hermerding, II ,  Pronay Dutta ,  Joshua Resch

IPC: G06F1/32 ,  G06F1/3296 ,  G06F9/48 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3234 ,  G06F1/26 ,  G06F9/50 ,  G06F1/30 ,  G06F1/329 ,  G06F1/3212

Abstract: In one embodiment, a processor includes: a plurality of processing elements to perform operations; a power management agent (PMA) coupled to the plurality of processing elements to control power consumption of the plurality of processing elements; and a throttling circuit coupled to the PMA. The throttling circuit is to determine a throttling power level for the plurality of processing elements based at least in part on translation information communicated from the PMA. Other embodiments are described and claimed.

公开(公告)号：US20190041969A1

公开(公告)日：2019-02-07

申请号：US15969198

申请日：2018-05-02

Applicant: Intel Corporation

Inventor： Chee Lim Nge ,  James G. Hermerding, II ,  Pronay Dutta ,  Joshua Resch

IPC: G06F1/32 ,  G06F9/48

Abstract: In one embodiment, a processor includes: a plurality of processing elements to perform operations; a power management agent (PMA) coupled to the plurality of processing elements to control power consumption of the plurality of processing elements; and a throttling circuit coupled to the PMA. The throttling circuit is to determine a throttling power level for the plurality of processing elements based at least in part on translation information communicated from the PMA. Other embodiments are described and claimed.