公开(公告)号：US20250150209A1

公开(公告)日：2025-05-08

申请号：US18834146

申请日：2023-04-21

Applicant: Intel Corporation

Inventor： Salvatore Talarico ,  Kilian Roth ,  Alexey Khoryaev ,  Sergey Panteleev ,  Mikhail Shilov

IPC: H04L1/1812 ,  H04L1/1867 ,  H04W72/0446 ,  H04W72/25 ,  H04W72/30 ,  H04W92/18

Abstract: Various embodiments herein provide techniques related to hybrid automatic repeat request (HARQ) feedback of a new radio (NR) sidelink (SL) transmission. Specifically, in embodiments, a user equipment (UE) may perform, in a first slot of a plurality of slots, a listen before talk (LBT) procedure related to a NR SL transmission. The UE may further identify a subset of two or more candidate slots of the plurality of slots for transmission of a HARQ message related to the LBT procedure. The UE may further transmit the HARQ message in a candidate slot of the two or more candidate slots. Other embodiments may be described and/or claimed.

公开(公告)号：US20230164745A1

公开(公告)日：2023-05-25

申请号：US18094875

申请日：2023-01-09

Applicant: Intel Corporation

Inventor： Alexey Khoryaev ,  Mikhail Shilov ,  Sergey Panteleev ,  Kilian Roth

IPC: H04W72/02 ,  H04W72/25

CPC classification number: H04W72/02 ,  H04W72/25 ,  H04W80/02

Abstract: Various embodiments herein provide techniques for sending and receiving inter-user equipment (UE) coordination information for sidelink communication. The inter-UE coordination information may be provided via sidelink control information (SCI) and/or medium access control-control element (MAC-CE). Aspects regarding resource reservation and/or indication for UE coordination information are described. Additionally, new SCI formats for inter-UE coordination information are provided. Other embodiments may be described and claimed.

公开(公告)号：US11115336B2

公开(公告)日：2021-09-07

申请号：US16792503

申请日：2020-02-17

Applicant: Intel Corporation

Inventor： Dario Sabella ,  Kilian Roth

IPC: H04L12/801 ,  H04L12/14 ,  H04L12/911 ,  H04W92/18 ,  H04M15/00 ,  H04W4/24 ,  H04L29/06

Abstract: Embodiments herein may include systems, apparatuses, methods, and computer-readable media, for a multi-access edge computing (MEC) system. An apparatus for MEC may include a communication interface, a local cost measurements module, and a service allocation module. The communication interface may receive, from a UE, a request for a service to be provided to the UE. The local cost measurements module may collect a set of local cost measurements for the service. The service allocation module may determine to allocate the service to a MEC host based on an allocation policy related to a cost for the MEC host to provide the service or a cost for a service provider to provide the service in view of the one or more local cost measurements. Other embodiments may be described and/or claimed.

公开(公告)号：US20200280827A1

公开(公告)日：2020-09-03

申请号：US16623348

申请日：2018-06-28

Applicant: Intel Corporation

Inventor： Stefan Fechtel ,  Kilian Roth ,  Bertram Gunzelmann ,  Markus Dominik Mueck ,  Ingolf Karls ,  Zhibin Yu ,  Thorsten Clevorn ,  Nageen Himayat ,  Dave A. Cavalcanti ,  Ana Lucia Pinheiro ,  Bahareh Sadeghi ,  Hassnaa Moustafa ,  Marcio Rogerio Juliato ,  Rafael Misoczki ,  Emily H. Qi ,  Jeffrey R. Foerster ,  Duncan Kitchin ,  Debdeep Chatterjee ,  Jong-Kae Fwu ,  Carlos Aldana ,  Shilpa Talwar ,  Harry G. Skinner ,  Debabani Choudhury

IPC: H04W4/40 ,  H04W80/08 ,  H04W80/02 ,  H04W4/80 ,  H04W8/08

Abstract: Systems, devices, and techniques for V2X communications using multiple radio access technologies (RATs) are described herein. A communication associated with one or more of the multiple RATs may be received at a device. The device may include a transceiver interface with multiple connections to communicate with multiple transceiver chains. The multiple transceiver chains can be configured to support multiple RATs. Additionally, the multiple transceiver chains may be controlled via the multiple connections of the transceiver interface to coordinate the multiple RATs to complete the communication.

公开(公告)号：US12200041B2

公开(公告)日：2025-01-14

申请号：US18200282

申请日：2023-05-22

Applicant: Intel Corporation

Inventor： Dario Sabella ,  Miltiadis Filippou ,  Kilian Roth ,  Ingolf Karls ,  Yang Yang ,  Jing Zhu

IPC: H04L29/08 ,  G06F9/50 ,  H04L12/24 ,  H04L47/762 ,  H04L47/80 ,  H04L67/04 ,  H04L67/10 ,  H04W28/02 ,  H04W52/02 ,  H04W8/24

Abstract: Systems, apparatuses, methods, and computer-readable media, are provided for offloading computationally intensive tasks from one computer device to another computer device taking into account, inter alia, energy consumption and latency budgets for both computation and communication. Embodiments may also exploit multiple radio access technologies (RATs) in order to find opportunities to offload computational tasks by taking into account, for example, network/RAT functionalities, processing, offloading coding/encoding mechanisms, and/or differentiating traffic between different RATs. Other embodiments may be described and/or claimed.

公开(公告)号：US20240015203A1

公开(公告)日：2024-01-11

申请号：US18200282

申请日：2023-05-22

Applicant: Intel Corporation

Inventor： Dario Sabella ,  Miltiadis Filippou ,  Kilian Roth ,  Ingolf Karls ,  Yang Yang ,  Jing Zhu

IPC: H04L67/04 ,  H04W52/02 ,  H04L67/10 ,  G06F9/50 ,  H04W28/02 ,  H04L47/80 ,  H04L47/762

CPC classification number: H04L67/04 ,  H04W52/0264 ,  H04L67/10 ,  G06F9/5027 ,  G06F9/505 ,  H04W28/0205 ,  H04L47/803 ,  G06F9/5072 ,  H04L47/762 ,  G06F2209/509 ,  Y02D30/70

Abstract: Systems, apparatuses, methods, and computer-readable media, are provided for offloading computationally intensive tasks from one computer device to another computer device taking into account, inter alia, energy consumption and latency budgets for both computation and communication. Embodiments may also exploit multiple radio access technologies (RATs) in order to find opportunities to offload computational tasks by taking into account, for example, network/RAT functionalities, processing, offloading coding/encoding mechanisms, and/or differentiating traffic between different RATs. Other embodiments may be described and/or claimed.

公开(公告)号：US11784143B2

公开(公告)日：2023-10-10

申请号：US16421315

申请日：2019-05-23

Applicant: Intel Corporation

Inventor： Sonja Koller ,  Kilian Roth ,  Josef Hagn ,  Andreas Wolter ,  Andreas Augustin

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01P3/00 ,  H01P11/00 ,  H01Q1/22 ,  H01L21/56

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/315 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/552 ,  H01P3/003 ,  H01P11/001 ,  H01Q1/2283 ,  H01L2223/6627 ,  H01L2223/6638 ,  H01L2223/6677

Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a conductive cavity antenna over the first conductive layer and substrate. The conductive cavity antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the conductive cavity antenna, first conductive layer, and substrate. The conductive cavity extends vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects. The first interconnects may include through-mold vias (TMVs), through-silicon vias (TSVs), conductive sidewalls, or conductive trenches.

公开(公告)号：US11695821B2

公开(公告)日：2023-07-04

申请号：US17347961

申请日：2021-06-15

Applicant: Intel Corporation

Inventor： Dario Sabella ,  Miltiadis Filippou ,  Kilian Roth ,  Ingolf Karls ,  Yang Yang ,  Jing Zhu

IPC: H04L29/08 ,  H04L67/04 ,  H04W52/02 ,  H04L67/10 ,  G06F9/50 ,  H04W28/02 ,  H04L47/80 ,  H04L47/762 ,  H04W4/18

CPC classification number: H04L67/04 ,  G06F9/505 ,  G06F9/5027 ,  G06F9/5072 ,  H04L47/762 ,  H04L47/803 ,  H04L67/10 ,  H04W28/0205 ,  H04W52/0264 ,  G06F2209/509 ,  Y02D30/70

Abstract: Systems, apparatuses, methods, and computer-readable media, are provided for offloading computationally intensive tasks from one computer device to another computer device taking into account, inter alia, energy consumption and latency budgets for both computation and communication. Embodiments may also exploit multiple radio access technologies (RATs) in order to find opportunities to offload computational tasks by taking into account, for example, network/RAT functionalities, processing, offloading coding/encoding mechanisms, and/or differentiating traffic between different RATs. Other embodiments may be described and/or claimed.

公开(公告)号：US20250106872A1

公开(公告)日：2025-03-27

申请号：US18833815

申请日：2023-04-20

Applicant: Intel Corporation

Inventor： Kilian Roth ,  Salvatore Talarico ,  Alexey Khoryaev ,  Sergey Panteleev ,  Mikhail Shilov

IPC: H04W72/25 ,  H04L5/00 ,  H04W72/0446

Abstract: Various embodiments herein are related to new radio (NR) sidelink (SL) operation in the unlicensed spectrum. Specifically, various embodiments may relate to design parameters or implementations of a physical SL control channel (PSCCH) and/or physical SL shared channel (PSSCH) in such a network. Other embodiments may be described and/or claimed.

公开(公告)号：US11646498B2

公开(公告)日：2023-05-09

申请号：US16414356

申请日：2019-05-16

Applicant: Intel Corporation

Inventor： Kilian Roth ,  Sonja Koller ,  Josef Hagn ,  Andreas Wolter ,  Andreas Augustin

IPC: H01L23/34 ,  H01Q13/18 ,  H01L23/66 ,  H01L23/528 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48 ,  H01L23/498 ,  H01Q1/22

CPC classification number: H01Q13/18 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/528 ,  H01L23/66 ,  H01Q1/2283 ,  H01L2223/6616 ,  H01L2223/6677

Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a cavity resonator antenna over the first conductive layer and substrate. The cavity resonator antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the cavity resonator antenna, first conductive layer, and substrate. The conductive cavity may extend vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects. The first interconnects may include through-mold vias (TMVs), through-silicon vias (TSVs), conductive sidewalls, or conductive trenches.