公开(公告)号：US20220199458A1

公开(公告)日：2022-06-23

申请号：US17127860

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Michael Makowski ,  Sudipto Naskar ,  Ryan Pearce ,  Nita Chandrasekhar ,  Minyoung Lee ,  Christopher Parker

IPC: H01L21/762 ,  H01L21/02 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78

Abstract: Transistors structures comprising a semiconductor features and dielectric material comprising silicon and oxygen in gaps or spaces between the features. The dielectric material may fill the gaps from bottom-up with an atomic layer deposition (ALD) process that includes a silicon deposition phase, and an oxidation phase augmented by N2:NH3 plasma activated nitrogen species. Being plasma activated, the nitrogen species have short mean free paths, and therefore preferentially passivate surfaces with low aspect ratios. This aspect-ratio dependent passivation may increase an energy barrier to surface reactions with a silicon precursor, resulting in a concomitant differential in deposition rate. With N2:NH3 plasma passivation, deposited dielectric material may have a nitrogen concentration that varies by at least order of magnitude as a function of the aspect ratio of the filled gaps.

公开(公告)号：US12087614B2

公开(公告)日：2024-09-10

申请号：US17127860

申请日：2020-12-18

Applicant: Intel Corporation

Inventor： Michael Makowski ,  Sudipto Naskar ,  Ryan Pearce ,  Nita Chandrasekhar ,  Minyoung Lee ,  Christopher Parker

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/76224 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/7851

Abstract: Transistors structures comprising a semiconductor features and dielectric material comprising silicon and oxygen in gaps or spaces between the features. The dielectric material may fill the gaps from bottom-up with an atomic layer deposition (ALD) process that includes a silicon deposition phase, and an oxidation phase augmented by N2:NH3 plasma activated nitrogen species. Being plasma activated, the nitrogen species have short mean free paths, and therefore preferentially passivate surfaces with low aspect ratios. This aspect-ratio dependent passivation may increase an energy barrier to surface reactions with a silicon precursor, resulting in a concomitant differential in deposition rate. With N2:NH3 plasma passivation, deposited dielectric material may have a nitrogen concentration that varies by at least order of magnitude as a function of the aspect ratio of the filled gaps.

公开(公告)号：US20200211833A1

公开(公告)日：2020-07-02

申请号：US16632449

申请日：2017-08-22

Applicant: Intel Corporation

Inventor： Ryan Pearce ,  Sudipto Naskar ,  Nita Chandrasekhar ,  Minyoung Lee ,  Harinath Reddy ,  Christopher G. Parker

IPC: H01L21/02 ,  H01L21/768 ,  H01L21/762

Abstract: An integrated circuit device includes: a semiconductor structure having a high aspect ratio (HAR) feature, the HAR feature having a depth of between 25 nanometers (nm) and 250 nm, a width of between 5 nm and 50 nm, and a depth-to-width aspect ratio of 5:1 or more; and a gap-fill material at least partially filling the HAR feature, the gap-fill material including silicon and nitrogen and being substantially free of a seam located between opposing sides of the HAR feature. A semiconductor process platform includes a nitrogen radical generator to generate nitrogen radicals for delivery to one of the zones, each zone being configured to deliver a separate precursor of a deposition cycle. A method of semiconductor device fabrication includes reacting surfaces of the HAR feature with a silicon precursor, and reacting the silicon-precursed surfaces with nitrogen plasma to form a monolayer of silicon nitride.