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公开(公告)号:US20220075655A1
公开(公告)日:2022-03-10
申请号:US17529149
申请日:2021-11-17
Applicant: Intel Corporation
Inventor: Akhilesh S. THYAGATURU , Mohit Kumar GARG , Vinodh GOPAL
IPC: G06F9/50
Abstract: Methods, apparatus, and software for efficient accelerator offload in multi-accelerator frameworks. One multi-accelerator framework employs a compute platform including a plurality of processor cores and a plurality of accelerator devices. An application is executed on a first core and a portion of the application workload is offloaded to a first accelerator device. In connection with moving execution of the application to a second core, a second accelerator devices to be used for the offloaded workload is selected based on core-to-accelerator cost information for the second core. This core-to-accelerator cost information includes core-accelerator cost information for combinations of core-accelerator pairs, which are based, at least on part, on latencies projected for interconnect paths between cores and accelerators. Both single-socket and multi-socket platform are supported. The solutions include mechanisms for moving offloaded workloads for multiple accelerator devices, as well as synchronizing accelerator operations and workflows.
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公开(公告)号:US20220149625A1
公开(公告)日:2022-05-12
申请号:US17586482
申请日:2022-01-27
Applicant: Intel Corporation
Inventor: Akhilesh S. THYAGATURU , Saidulu ALDAS , Vinodh GOPAL , Mohit Kumar GARG , Patrick CONNOR
Abstract: Examples described herein relate to controlling power available to processes and hardware devices to control a monetary cost of utilized electricity and/or amount of energy utilized from non-renewable energy sources. The system can modify operating configurations of processes and/or hardware based on the available power. The system can control total power drawn to control a monetary cost of power and/or avoid drawing power from non-renewable sources (e.g., fossil fuel sources or grid including gas or coal-based energy sources).
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公开(公告)号:US20240103861A1
公开(公告)日:2024-03-28
申请号:US18533487
申请日:2023-12-08
Applicant: Intel Corporation
Inventor: Akhilesh S. THYAGATURU , Francesc GUIM BERNAT , Karthik KUMAR , Mohit Kumar GARG
IPC: G06F9/30
CPC classification number: G06F9/3004
Abstract: An apparatus is described. The apparatus includes a memory module. The memory module includes a memory. The memory module includes function execution circuitry. The function execution circuitry is configurable to execute a producer function and a consumer function of a multi-function process. The memory module includes an interface to be coupled to a memory controller.
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公开(公告)号:US20230205594A1
公开(公告)日:2023-06-29
申请号:US18116694
申请日:2023-03-02
Applicant: Intel Corporation
Inventor: Akhilesh S. THYAGATURU , Robert KAMP , Anil S. KESHAVAMURTHY , Mohit Kumar GARG
IPC: G06F9/50 , G06F9/4401 , G06F9/455
CPC classification number: G06F9/5044 , G06F9/4403 , G06F9/45541
Abstract: Examples described herein relate to executing a first boot firmware code to receive an allocation of hardware devices and allocating, by the first boot firmware code, resource allocations to one or more secondary boot firmware codes. In some examples, the one or more secondary boot firmware codes allocate use of hardware devices to one or more operating systems (OSs).
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公开(公告)号:US20240022111A1
公开(公告)日:2024-01-18
申请号:US18375034
申请日:2023-09-29
Applicant: Intel Corporation
Inventor: Akhilesh S. THYAGATURU , Francesc GUIM BERNAT , Patrick CONNOR , Vinodh GOPAL , Mohit Kumar GARG
IPC: H02J13/00
CPC classification number: H02J13/00028
Abstract: A method is described. The method includes receiving a request. The method includes allocating and/or configuring hardware to execute the request in accordance with an energy related input specified by a sender of the request. The method includes causing execution of the request in accordance with the energy related input.
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