公开(公告)号：US20240037038A1

公开(公告)日：2024-02-01

申请号：US18478621

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Nagabhushan Chitlur ,  Darren Michael Andrus ,  Kelly Hagen ,  Randall Bright

IPC: G06F12/0831 ,  G06F12/0817 ,  G06F13/42

CPC classification number: G06F12/0835 ,  G06F12/0817 ,  G06F13/4234

Abstract: Circuitry, systems, and methods are provided for an integrated circuit including an acceleration function unit to provide hardware acceleration for a host device. The integrated circuit may also include interface circuitry including a cache coherency bridge/agent including a device cache to resolve coherency with a host cache of the host device. The interface circuitry may also include cacheline state tracker circuitry to track states of cachelines of the device cache and the host cache. The cacheline state tracker circuitry provides insights to expected state changes based on states of the cachelines of the device cache, the host cache, and a type of operation performed.