公开(公告)号：US11237626B2

公开(公告)日：2022-02-01

申请号：US16662403

申请日：2019-10-24

Applicant: Intel Corporation

Inventor： Ravindra A. Babu ,  Sashank Ms ,  Satyanantha R. Musunuri ,  Sagar C. Pawar ,  Kalyan K. Kaipa ,  Vijayakumar Balakrishnan ,  Sameer Kp

IPC: G06T1/20 ,  G06T15/80 ,  G06F3/01 ,  G02B27/01

Abstract: When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.

公开(公告)号：US11206390B2

公开(公告)日：2021-12-21

申请号：US16696050

申请日：2019-11-26

Applicant: Intel Corporation

Inventor： Ravindra A. Babu ,  Sagar C. Pawar ,  Satyanantha R. Musunuri ,  Sashank Ms ,  Kalyan K. Kaipa

IPC: G09G5/00 ,  H04N13/332 ,  G06T1/20 ,  H04N13/327 ,  G06T15/00 ,  G06T11/00 ,  H04N13/344

Abstract: Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may to barrel an initial image to form a barreled image.

公开(公告)号：US20200225994A1

公开(公告)日：2020-07-16

申请号：US16832372

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Pannerkumar Rajagopal ,  Murali R. Iyengar ,  Karunakara Kotary ,  Ovais Pir ,  Sagar C. Pawar ,  Prakash Pillai ,  Raghavendra N. ,  Aneesh A. Tuljapurkar

IPC: G06F9/50 ,  G06F9/4401 ,  G06F9/54 ,  G06F12/1009 ,  G06T1/60

Abstract: Described is a system where memory can be allocated for use by an adapter pre-boot and preserved for use post-boot. A BIOS can allocate for pre-boot hardware operations (e.g., graphics drivers, framebuffers, etc.) and mark this allocated memory as preserved. An indication of the allocated memory can be provided for an OS, such that post-boot, the OS can reclaim and reallocate this memory.

公开(公告)号：US10652364B2

公开(公告)日：2020-05-12

申请号：US15393159

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Sagar C. Pawar ,  Ravindra A. Babu ,  Satyanantha R. Musunuri ,  Sashank Ms

IPC: H04L29/06 ,  H04L29/08

Abstract: Embodiments include apparatuses, methods, and systems including a communication aggregator having a first interface to communicate with a host through a first link based on a first protocol, a second interface coupled to the first interface to communicate with a display device through a second link based on the first protocol, and a third interface coupled to the first interface to communicate with a sensor through a third link coupled to the third interface based on a second protocol. Moreover, the host is to communicate with the display device through the first link based on the first protocol, and the second link based on the first protocol; and the sensor is to communicate with the host through the third link based on the second protocol, and the first link based on the first protocol. Other embodiments may also be described and claimed.

公开(公告)号：US20180286022A1

公开(公告)日：2018-10-04

申请号：US15477045

申请日：2017-04-01

Applicant: Intel Corporation

Inventor： Ravindra A. Babu ,  Sagar C. Pawar ,  Satyanantha R. Musunuri ,  Sashank Ms ,  Kalyan K. Kaipa

IPC: G06T5/00 ,  G06T1/20 ,  G06T7/80 ,  H04N13/04 ,  G02B27/01

Abstract: Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may barrel an initial image to form a barreled image. In one example, the display pipeline further performs chromatic correction of the initial image.

公开(公告)号：US20180278075A1

公开(公告)日：2018-09-27

申请号：US15467874

申请日：2017-03-23

Applicant: Intel Corporation

Inventor： Sagar C. Pawar ,  Anantha Narayanan ,  Ravindra A. Babu ,  Aneesh A. Tuljapurkar

IPC: H02J7/00

CPC classification number: H02J7/0068 ,  G06F1/266 ,  G06F1/3212 ,  H02J7/0047 ,  H02J7/0054 ,  H02J7/027 ,  H02J2007/005 ,  H02J2007/0062 ,  H02J2007/0096

Abstract: An apparatus system is provided which comprises: a first input/output (I/O) port; a second I/O port; circuitry to generate (i) a first signal at a first voltage level and (ii) a second signal at a second voltage level; and switching circuitry to selectively supply any one of the first signal or the second signal to any one of the first I/O port or the second I/O port.

公开(公告)号：US20180183898A1

公开(公告)日：2018-06-28

申请号：US15393159

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Sagar C. Pawar ,  Ravindra A. Babu ,  Satyanantha R. Musunuri ,  Sashank Ms

IPC: H04L29/06 ,  H04L29/08

CPC classification number: H04L67/38 ,  H04L67/14 ,  H04L67/42

Abstract: Embodiments include apparatuses, methods, and systems including a communication aggregator having a first interface to communicate with a host through a first link based on a first protocol, a second interface coupled to the first interface to communicate with a display device through a second link based on the first protocol, and a third interface coupled to the first interface to communicate with a sensor through a third link coupled to the third interface based on a second protocol. Moreover, the host is to communicate with the display device through the first link based on the first protocol, and the second link based on the first protocol; and the sensor is to communicate with the host through the third link based on the second protocol, and the first link based on the first protocol. Other embodiments may also be described and claimed.

公开(公告)号：US20230315198A1

公开(公告)日：2023-10-05

申请号：US18181615

申请日：2023-03-10

Applicant: Intel Corporation

Inventor： Ravindra A. Babu ,  Sashank Ms ,  Satyanantha R. Musunuri ,  Sagar C. Pawar ,  Kalyan K. Kaipa ,  Vijayakumar Balakrishnan ,  Sameer Kp

IPC: G06F3/01 ,  G06T1/20 ,  G02B27/01

CPC classification number: G06F3/012 ,  G02B27/017 ,  G06F3/017 ,  G06T1/20 ,  G02B2027/0147 ,  G06F3/011

Abstract: When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.

公开(公告)号：US11650658B2

公开(公告)日：2023-05-16

申请号：US16868652

申请日：2020-05-07

Applicant: Intel Corporation

Inventor： Ravindra A. Babu ,  Sashank Ms ,  Satyanantha R. Musunuri ,  Sagar C. Pawar ,  Kalyan K. Kaipa ,  Vijayakumar Balakrishnan ,  Sameer Kp

IPC: G06T1/20 ,  G09G5/391 ,  G02B27/01 ,  G06F3/01

CPC classification number: G06F3/012 ,  G02B27/017 ,  G06F3/017 ,  G06T1/20 ,  G02B2027/0147 ,  G06F3/011

Abstract: When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.

公开(公告)号：US20220224877A1

公开(公告)日：2022-07-14

申请号：US17530551

申请日：2021-11-19

Applicant: Intel Corporation

Inventor： Ravindra A. Babu ,  Sagar C. Pawar ,  Satyanantha R. Musunuri ,  Sashank Ms ,  Kalyan K. Kaipa

IPC: H04N13/332 ,  G06T1/20 ,  H04N13/327 ,  G06T15/00 ,  G06T11/00

Abstract: Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may to barrel an initial image to form a barreled image.