公开(公告)号：US20230112575A1

公开(公告)日：2023-04-13

申请号：US18080980

申请日：2022-12-14

Applicant: Intel Corporation

Inventor： Prerna Budhkar ,  Tanvi Sharma ,  Srivatsa Rangachar Srinivasa ,  Dileep John Kurian ,  Tanay Karnik

IPC: G06F12/0864 ,  G06F12/14

Abstract: A hash accelerator of a cache memory may receive a query from a processor comprising the cache memory, the query to comprise an input key and an operation to be performed based on a hash table stored in the cache memory. The hash accelerator may determine whether an entry associated with the input key exists in a lock board of the hash accelerator. The hash accelerator may process the query based on whether the entry exists in the lock board.