公开(公告)号：US20160163676A1

公开(公告)日：2016-06-09

申请号：US15042075

申请日：2016-02-11

Applicant: Intel Corporation

Inventor： Chuan Hu ,  Vijay NAIR

IPC: H01L23/00 ,  H01L21/78 ,  H01L21/768 ,  H01L21/56 ,  H01L25/16

CPC classification number: H01L24/97 ,  H01L21/563 ,  H01L21/565 ,  H01L21/568 ,  H01L21/768 ,  H01L21/78 ,  H01L24/11 ,  H01L24/19 ,  H01L24/73 ,  H01L24/81 ,  H01L24/96 ,  H01L25/03 ,  H01L25/16 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/83385 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19011 ,  H01L2924/3011 ,  Y10T29/49124 ,  Y10T29/4913 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85 ,  H01L2924/00014

Abstract: In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board.