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公开(公告)号:US20240231801A1
公开(公告)日:2024-07-11
申请号:US18557897
申请日:2022-05-26
Applicant: Intel Corporation
Inventor: Subrata BANIK , Rajesh POORNACHANDRAN , Vincent ZIMMER , Utkarsh Y. KAKAIYA
IPC: G06F8/65 , G06F1/3212
CPC classification number: G06F8/65 , G06F1/3212
Abstract: The technology disclosed herein includes getting a system update configuration for managing updating of at least one of a software component and a firmware component of a computing system powered by a battery; determining an estimated system update time of usage of the battery to update the at least one of the software component and the firmware component based at least in part on the system update configuration; updating the at least one of the software component and the firmware component when resource requirements of the system update configuration are met and the estimated system update time is less than or equal to a minimum remaining time of usage of the battery; and deferring the updating when the resource requirements of the system update configuration are not met or the estimated system update time is greater than the minimum remaining time of usage of the battery.
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公开(公告)号:US20240385754A1
公开(公告)日:2024-11-21
申请号:US18570674
申请日:2021-12-14
Applicant: Intel Corporation
Inventor: Zhenglong WU , Daocheng BU , Dujian WU , Yufu LI , Vincent ZIMMER
IPC: G06F3/06
Abstract: Various examples relate to a control apparatus, a control device, a method, and a computer program for managing repair of a memory circuitry, and to a corresponding computing device. The control apparatus comprises processing circuitry configured to determine a score of a memory failure probability of at least one memory cell of the memory circuitry and trigger a repair procedure of the at least one memory cell of the memory circuitry when the score reaches a threshold.
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公开(公告)号:US20240176624A1
公开(公告)日:2024-05-30
申请号:US18553213
申请日:2022-04-01
Applicant: Intel Corporation
Inventor: Vincent ZIMMER , Subrata BANIK , Rajaram REGUPATHY , Salil MATHACHAN THOMAS
IPC: G06F9/4401 , G06F9/455 , G06F13/42
CPC classification number: G06F9/4403 , G06F9/45504 , G06F13/4282
Abstract: Various examples of the present disclosure relate to a computing device, and to a method and computer program for initializing a computing device. The computing device comprises a memory device, configured to store firmware for at least a first processing unit and a second processing unit. The computing device comprises a first processing unit, configured to obtain the firmware for the first processing unit from the memory device, and to initialize itself using the firmware obtained from the memory device. The computing device comprises a second processing unit, configured to obtain the firmware for the second processing unit from the memory device, and to initialize itself using the firmware obtained from the memory device.
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4.
公开(公告)号:US20240281252A2
公开(公告)日:2024-08-22
申请号:US17934580
申请日:2022-09-23
Applicant: Intel Corporation
Inventor: Mingqiu SUN , Vincent ZIMMER , Rajesh POORNACHANDRAN , Gopinatth SELVARAJE
CPC classification number: G06F9/30181 , G06F9/45508 , G06F21/57
Abstract: Various examples relate to an apparatus, device, method, and computer program for extending instructions supported by a processor. The apparatus is configured to identify at least a part of a computer program targeting an instruction unsupported by a pre-defined set of instructions of an Instruction Set Architecture (ISA) of the processor. The apparatus is configured to extend the instructions supported by the processor, based on the targeted unsupported instruction. The apparatus is configured to execute the computer program.
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公开(公告)号:US20230093493A1
公开(公告)日:2023-03-23
申请号:US17936861
申请日:2022-09-30
Applicant: Intel Corporation
Inventor: Rajesh POORNACHANDRAN , Kshitij Arun DOSHI , Vinayak HONKOTE , Vincent ZIMMER , Subrata BANIK
IPC: G06F11/07
Abstract: Examples of the present disclosure relate to an apparatus, device, method, and computer program for configuring a processing device, and to a computer system comprising such an apparatus or device. The apparatus or device is configured to obtain information on a failure related to a component of the processing device, with the failure having occurred at runtime of the processing device, determine information on a microcode update to be applied to the processing device to remedy the failure related to the component, and configure the processing device to apply the microcode update.
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6.
公开(公告)号:US20240143329A1
公开(公告)日:2024-05-02
申请号:US17934580
申请日:2022-09-23
Applicant: Intel Corporation
Inventor: Mingqiu SUN , Vincent ZIMMER , Rajesh POORNACHANDRAN , Gopinatth SELVARAJE
CPC classification number: G06F9/30181 , G06F9/45508 , G06F21/57
Abstract: Various examples relate to an apparatus, device, method, and computer program for extending instructions sup-ported by a processor. The apparatus is configured to identify at least a part of a computer program targeting an instruction unsupported by a pre-defined set of instructions of an Instruction Set Architecture (ISA) of the processor. The apparatus is configured to extend the instructions supported by the processor, based on the targeted unsupported instruction. The apparatus is configured to execute the computer program.
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公开(公告)号:US20220137955A1
公开(公告)日:2022-05-05
申请号:US17454564
申请日:2021-11-11
Applicant: Intel Corporation
Inventor: Nivedita AGGARWAL , Prashant DEWAN , Subrata BANIK , Ofir SHWARTZ , Baiju V. PATEL , Yazan SIAM , Kumar DWARAKANATH , Vincent ZIMMER
Abstract: A method of handling a firmware update for a device is disclosed, comprising: determining a device to be in an updatable state; setting the device into an updating state after determining the updatable state; and after the device is in the updating state, writing a firmware update to memory for the device. After writing the firmware update, the device is switchable to a working state in which the device operates based on the firmware update.
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公开(公告)号:US20230393973A1
公开(公告)日:2023-12-07
申请号:US18193683
申请日:2023-03-31
Applicant: Intel Corporation
Inventor: Rajesh POORNACHANDRAN , Vincent ZIMMER
CPC classification number: G06F12/0246 , G06F11/3037 , G06F2212/7205
Abstract: It is proposed an apparatus, the apparatus comprising interface circuitry, machine-readable instructions, and a semiconductor die comprising processing circuitry to execute the machine-readable instructions to obtain data associated with the processing circuitry, and store the data in non-volatile memory integrated into the semiconductor die.
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9.
公开(公告)号:US20220019444A1
公开(公告)日:2022-01-20
申请号:US17449098
申请日:2021-09-28
Applicant: Intel Corporation
Inventor: Di ZHANG , Sarathy JAYAKUMAR , Vincent ZIMMER , Fei LI , Bo HE , Zhuangzhi LI , Zhi JIN , Lin CHEN , Guomin JIANG
IPC: G06F9/4401 , G06F1/24
Abstract: An electronic device is disclosed, including a first set of processor cores including at least one processor core and a second set of processor cores including at least one processor core. The electronic device is configured such that during initialization of the electronic device: the first set of processor cores executes first initialization instructions in a first execution environment, the second set of processor cores executes second initialization instructions in a second execution environment, and the first set and the second set at least one of read or write to a shared register.
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