公开(公告)号：US20170358462A1

公开(公告)日：2017-12-14

申请号：US15621493

申请日：2017-06-13

Applicant: J-DEVICES CORPORATION

Inventor： Seita ARAKI ,  Kazuhiko KITANO

IPC: H01L21/56 ,  H01L23/00 ,  H01L21/78

CPC classification number: H01L21/561 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/03 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2223/54426 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/83138 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/3025 ,  H01L2924/351 ,  H01L2224/83

Abstract: A manufacturing method of a semiconductor package includes disposing one or more semiconductor devices on a base substrate, each of the one or more semiconductor devices having an external terminal; forming a frame on the base substrate, the frame surrounding the one or more semiconductor devices; and forming a resin insulating layer inside the frame, the resin insulating layer sealing the one or more semiconductor devices and the resin insulating layer including a resin insulating material; wherein a surface of each of the one or more semiconductor devices on which the external terminal is not provided faces the base substrate.