公开(公告)号：US20120244728A1

公开(公告)日：2012-09-27

申请号：US13418853

申请日：2012-03-13

Applicant: JAMES RATHBURN

Inventor： JAMES RATHBURN

IPC: H01R12/71 ,  H05K3/00 ,  H05K3/34 ,  H01C17/06 ,  H01P11/00 ,  H01R43/16 ,  H01G4/00

CPC classification number: H01R12/523 ,  H01C1/14 ,  H01G4/228 ,  H01R12/7082 ,  H05K1/0231 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/4038 ,  H05K3/4092 ,  H05K7/1069 ,  H05K7/1092 ,  H05K2201/049 ,  Y10T29/43 ,  Y10T29/49016 ,  Y10T29/49099 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49222

Abstract: A surface mount electrical interconnect adapted to provide an interface between solder balls on a BGA device and a PCB. A socket substrate is provided with a first surface, a second surface, and a plurality of openings sized and configured to receive the solder balls on the BGA device. A plurality of electrically conductive contact tabs are attached to the socket substrate so that contact tips on the contact tabs extend into the openings. The contact tips electrically couple with the BGA device when the solder balls are positioned in the openings. Vias electrically couple the contact tabs to contact pads located proximate the second surface of the socket substrate. Solder balls are bonded to the contact pads to electrically and mechanically couple the electrical interconnect to the PCB.

Abstract translation: 适于在BGA器件上的焊球和PCB之间提供界面的表面贴装电互连。 插座衬底设置有第一表面，第二表面和多个开口，其尺寸和构造用于容纳BGA器件上的焊球。 多个导电接触突片附接到插座基底，使得接触片上的接触尖端延伸到开口中。 当焊球定位在开口中时，接触尖端与BGA器件电耦合。 通孔将接触片电耦合到位于插座衬底的第二表面附近的接触垫。 焊球结合到接触焊盘，以电连接和机械耦合电互连到PCB。

公开(公告)号：US20120182035A1

公开(公告)日：2012-07-19

申请号：US13413032

申请日：2012-03-06

Applicant: JAMES RATHBURN

Inventor： JAMES RATHBURN

IPC: G01R31/20

CPC classification number: G01R31/2889

Abstract: A probe assembly that acts as a temporary interconnect between terminals on an IC device and a test station. The probe assembly includes a plurality of stud bumps arranged on a first surface of a substrate in a configuration corresponding to the terminal on the IC device. The stud bumps include a shape adapted to temporarily couple with the terminals on the IC device. A plurality of conductive traces on the substrate electrically couple the stud bumps with the test station.

Abstract translation: 探针组件，用作IC器件和测试台之间的端子之间的临时互连。 探针组件包括布置在基板的第一表面上的多个突起凸块，其配置对应于IC器件上的端子。 螺柱凸块包括适于临时与IC器件上的端子连接的形状。 基板上的多个导电迹线使柱形突起与测试台电耦合。

公开(公告)号：US20120171907A1

公开(公告)日：2012-07-05

申请号：US13412870

申请日：2012-03-06

Applicant: JAMES RATHBURN

Inventor： JAMES RATHBURN

IPC: H01R13/24 ,  H01R43/16

CPC classification number: H01R12/57 ,  H01R12/52 ,  H01R12/523 ,  H01R12/716 ,  H01R13/2421 ,  H05K1/023 ,  H05K1/141 ,  H05K1/16 ,  H05K3/4007 ,  H05K2201/10378 ,  Y10T29/49204

Abstract: A electrical interconnect adapted to provide an interface between contact pads on an IC device and a PCB. The electrical interconnect includes a multi-layered substrate with a first surface with a plurality of first openings having first cross-sections, a second surface with a plurality of second openings having second cross-sections, and center openings connecting the first and second openings. The center openings include at least one cross-section greater than the first and second cross-sections. A plurality of spring probe contact members are located in the center openings. The contact members include first contact tips extending through the first opening and above the first surface, second contact tips extending through the second openings and above the second surface, and center portions located in the center openings. The center portions include a shape adapted to bias the first and second contact tips toward the IC device and PCB, respectively. A dielectric material different from the material of the substrate is located in at least one of the first opening, the second opening, or the center opening.

Abstract translation: 适于提供IC器件上的接触焊盘和PCB之间的接口的电互连。 电互连包括具有第一表面的多层基底，第一表面具有多个具有第一横截面的第一开口，具有多个具有第二横截面的第二开口的第二表面和连接第一和第二开口的中心孔。 中心开口包括大于第一和第二横截面的至少一个横截面。 多个弹簧探针接触构件位于中心开口中。 接触构件包括延伸穿过第一开口并在第一表面上方的第一接触尖端，延伸穿过第二开口并在第二表面上方的第二接触末端以及位于中心开口中的中心部分。 中心部分包​​括适于分别朝向IC器件和PCB偏置第一和第二接触尖端的形状。 与基板的材料不同的介电材料位于第一开口，第二开口或中心开口中的至少一个中。

公开(公告)号：US20120168948A1

公开(公告)日：2012-07-05

申请号：US13413724

申请日：2012-03-07

Applicant: JAMES RATHBURN

Inventor： JAMES RATHBURN

IPC: H01L23/498 ,  H01L21/50

CPC classification number: H01L23/49827 ,  G02B6/3608 ,  G02B6/4281 ,  H01L21/486 ,  H01L21/76831 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/60 ,  H01L24/13 ,  H01L24/48 ,  H01L25/16 ,  H01L2223/6627 ,  H01L2224/0401 ,  H01L2224/08235 ,  H01L2224/1132 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/81192 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electrical interconnect including a first circuitry layer with a first surface and a second surface. At least a first dielectric layer is printed on the first surface of the first circuitry layer to include a plurality of first recesses. A conductive material is deposited in a plurality of the first recesses to form a plurality of first conductive pillars electrically coupled to, and extending generally perpendicular to, the first circuitry layer. At least a second dielectric layer is printed on the first dielectric layer to include a plurality of second recesses generally aligned with a plurality of the first conductive pillars. A conductive material is deposited in a plurality of the second recesses to form a plurality of second conductive pillars electrically coupled to, and extending parallel the first conductive pillars.

Abstract translation: 一种电互连，包括具有第一表面和第二表面的第一电路层。 至少第一电介质层印刷在第一电路层的第一表面上以包括多个第一凹槽。 导电材料沉积在多个第一凹槽中以形成电耦合到第一电路层并且大致垂直于第一电路层延伸的多个第一导电柱。 至少第二电介质层印刷在第一电介质层上以包括与多个第一导电柱大致对准的多个第二凹部。 导电材料沉积在多个第二凹槽中以形成电耦合到第一导电柱并平行延伸的多个第二导电柱。

公开(公告)号：US20120164888A1

公开(公告)日：2012-06-28

申请号：US13410914

申请日：2012-03-02

Applicant: JAMES RATHBURN

Inventor： JAMES RATHBURN

IPC: H01R31/06 ,  H05K3/00

CPC classification number: H01R12/57 ,  H01R12/52 ,  H01R12/523 ,  H01R12/716 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4046 ,  H05K7/1069 ,  H05K2201/049 ,  Y10T29/49124

Abstract: A surface mount electrical interconnect to provide an interface between a PCB and contacts on an integrated circuit device. The electrical interconnect includes a substrate with a plurality of recesses arranged along a first surface to correspond to the contacts on the integrated circuit device. Contact members are located in a plurality of the recess. The contact members include contact tips adapted to electrically couple with the contacts on the integrated circuit device. An electrical interface including at least one circuit trace electrically couples the contact member to metalized pads located along a second surface of the substrate at a location offset from a corresponding contact member. A solder ball is attached to a plurality of the metalized pads.

Abstract translation: 表面安装电互连，以提供PCB与集成电路器件上的触点之间的接口。 电互连包括具有沿着第一表面布置以对应于集成电路器件上的触点的多个凹槽的衬底。 接触构件位于多个凹部中。 接触构件包括适于与集成电路器件上的触点电耦合的接触尖端。 包括至少一个电路迹线的电接口将电接触构件电耦合到沿着衬底的第二表面位于偏离对应接触构件的位置的金属化焊盘。 焊球连接到多个金属化焊盘。

公开(公告)号：US20120199985A1

公开(公告)日：2012-08-09

申请号：US13448865

申请日：2012-04-17

Applicant: JAMES RATHBURN

Inventor： JAMES RATHBURN

IPC: H01L23/522 ,  H01L21/50 ,  H01L21/768

CPC classification number: H01L23/34 ,  G01R1/0416 ,  H01L23/522 ,  H01L2224/13 ,  H05K3/325 ,  H05K3/4007 ,  H05K2201/0133 ,  H05K2201/0187 ,  H05K2201/09036 ,  H05K2201/09481 ,  H05K2201/0949 ,  H05K2201/10378 ,  H05K2203/162 ,  Y10T29/49165

Abstract: An electrical interconnect for providing a temporary interconnect between terminals on an IC device and contact pads on a printed circuit board (PCB). The electrical interconnect includes a substrate with a first surface having a plurality of openings arranged to correspond to the terminals on the IC device. A compliant material is located in the openings. A plurality of conductive traces extend along the first surface of the substrate and onto the compliant material. The compliant material provides a biasing force that resists flexure of the conductive traces into the openings. Conductive structures are electrically coupled to the conductive traces over the openings. The conductive structures are adapted to enhance electrical coupling with the terminals on the IC device. Vias electrically extending through the substrate couple the conductive traces to PCB terminals located proximate a second surface of the substrate.

Abstract translation: 用于在IC器件上的端子和印刷电路板（PCB）上的接触焊盘之间提供临时互连的电互连。 电互连包括具有第一表面的基板，该第一表面具有多个开口，其布置成对应于IC器件上的端子。 柔性材料位于开口中。 多个导电迹线沿着衬底的第一表面延伸到柔性材料上。 柔性材料提供抵抗导电迹线弯曲到开口中的偏置力。 导电结构电连接到开口上的导电迹线。 导电结构适于增强与IC器件上的端子的电耦合。 电气延伸通过衬底的通孔将导电迹线耦合到位于衬底的第二表面附近的PCB端子。

公开(公告)号：US20120161317A1

公开(公告)日：2012-06-28

申请号：US13410943

申请日：2012-03-02

Applicant: JAMES RATHBURN

Inventor： JAMES RATHBURN

IPC: H01L23/48 ,  H01L21/60

CPC classification number: H01L21/6835 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/60 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81201 ,  H01L2224/8138 ,  H01L2224/819 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H05K3/3436 ,  H01L2924/00

Abstract: An area array integrated circuit (IC) package for an IC device. The IC package includes a first substrate with conductive traces electrically coupled to the IC device. An interconnect assembly having a first surface is mechanically coupled to the first substrate. The interconnect assembly includes a plurality of contact members electrically coupled to the conductive traces on the first substrate. A second substrate is mechanically coupled to a second surface of the interconnect assembly so that the first substrate, the interconnect assembly, and the second substrate substantially surround the IC device. The second substrate includes conductive traces that are electrically coupled to the contact members in the interconnect assembly.

Abstract translation: 一种用于IC器件的面阵列集成电路（IC）封装。 IC封装包括具有电耦合到IC器件的导电迹线的第一衬底。 具有第一表面的互连组件机械耦合到第一基板。 互连组件包括电耦合到第一衬底上的导电迹线的多个接触部件。 第二基板机械耦合到互连组件的第二表面，使得第一基板，互连组件和第二基板基本上围绕IC器件。 第二基板包括电连接到互连组件中的接触构件的导电迹线。