公开(公告)号：US09564474B2

公开(公告)日：2017-02-07

申请号：US14391843

申请日：2013-06-19

Applicant: JOLED INC.

Inventor： Atsushi Sasaki ,  Eiichi Satoh ,  Hirofumi Higashi

IPC: H01L29/04 ,  H01L27/32 ,  H01L21/311 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L51/52

CPC classification number: H01L27/3244 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78693 ,  H01L51/5212 ,  H01L2227/323

Abstract: A method of manufacturing a thin film transistor (TFT) substrate in which a TFT including an oxide semiconductor layer is formed, the method including: forming an insulating layer to cover the oxide semiconductor layer; and forming an opening in the insulating layer, wherein the insulating layer includes a first film, a second film which is provided above the first film and is an aluminum oxide film, and a third film which is provided above the second film and is a film including silicon, and the forming of an opening includes: forming a resist pattern above the third film; processing the third film by dry etching; and processing the second film by wet etching.

Abstract translation: 一种制造薄膜晶体管（TFT）基板的方法，其中形成包括氧化物半导体层的TFT，所述方法包括：形成覆盖氧化物半导体层的绝缘层; 以及在所述绝缘层中形成开口，其中所述绝缘层包括第一膜，设置在所述第一膜上方并且是氧化铝膜的第二膜，以及设置在所述第二膜上方的第三膜， 包括硅，并且开口的形成包括：在第三膜上形成抗蚀剂图案; 通过干蚀刻处理第三片; 并通过湿蚀刻处理第二膜。

公开(公告)号：US09627515B2

公开(公告)日：2017-04-18

申请号：US15025389

申请日：2014-07-01

Applicant: JOLED INC.

Inventor： Eiichi Satoh

IPC: H01L29/66 ,  H01L29/41 ,  H01L29/49 ,  H01L29/786 ,  H01L21/02 ,  H01L21/465 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L29/66969 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02592 ,  H01L21/465 ,  H01L21/76801 ,  H01L21/76804 ,  H01L23/53233 ,  H01L29/41 ,  H01L29/4908 ,  H01L29/78693 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a thin-film transistor substrate that includes a thin-film transistor having a semiconductor layer, includes: forming a CuMn alloy film (third conductive film) above a substrate; forming a first silicon oxide film (first insulation film) on the CuMn alloy film at a first temperature; forming an aluminum oxide film (second insulation film) on the first silicon oxide film; and forming a second silicon oxide film (third insulation film) on the aluminum oxide film at a second temperature higher than the first temperature.

公开(公告)号：US09087904B2

公开(公告)日：2015-07-21

申请号：US14236698

申请日：2013-05-29

Applicant: JOLED INC.

Inventor： Yuji Kishida ,  Eiichi Satoh ,  Takahiro Kawashima

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  H01L21/768 ,  H01L27/32

CPC classification number: H01L29/786 ,  H01L21/76829 ,  H01L27/1248 ,  H01L27/3262 ,  H01L29/66742 ,  H01L29/66765

Abstract: A thin-film transistor includes: a gate electrode above a substrate; a gate insulating layer above the gate electrode; a semiconductor layer opposed to the gate electrode with the gate insulating layer therebetween; a protective layer above the semiconductor layer and comprising an organic material; and a source electrode and a drain electrode each of which has at least a portion located above the protective layer. The protective layer includes an altered layer which has at least a portion contacting the semiconductor layer, and which is generated by alteration of a surface layer of the protective layer in a region exposed from the source electrode and the drain electrode. A relational expression of Log10 Nt≦0.0556θ+16.86 is satisfied where Nt (cm−3) represents a defect density of the semiconductor layer and θ (°) represents a taper angle of an edge portion of the protective layer.

Abstract translation: 薄膜晶体管包括：在基板上方的栅电极; 栅电极上方的栅极绝缘层; 与栅电极相对的半导体层，其间具有栅极绝缘层; 在所述半导体层上方的保护层，并且包含有机材料; 以及源极电极和漏极电极，每个源电极和漏电极具有位于保护层上方的至少一部分。 保护层包括具有至少部分与半导体层接触的部分的改变的层，其是通过在从源电极和漏电极露出的区域中改变保护层的表面层而产生的。 在Nt（cm-3）表示半导体层的缺陷密度和厚度的情况下，满足Log10 Nt＆nlE; 0.0556＆het; +16.86的关系式; （°）表示保护层的边缘部的锥角。