公开(公告)号：US20230061015A1

公开(公告)日：2023-03-02

申请号：US17822684

申请日：2022-08-26

Applicant: JOLED INC.

Inventor： Hiroyuki YAMAKITA ,  Teruo NANMOKU ,  Masaki KAWASAKI ,  Tetsuro NAKAMURA ,  Shunsuke ITAKURA

IPC: H05K5/02 ,  H05K7/20

Abstract: Disclosed herein is a display device including a display panel having a display portion configured to display an image, a plate-shaped member having a first principal surface and a second principal surface, the display panel being disposed on a second principal surface side, the plate-shaped member including a screen portion disposed in a position corresponding to the display portion, an opaque frame member disposed at a peripheral edge of the screen portion, a bonding member that has transparency and is configured to bond the display panel and the plate-shaped member to each other, a holding member disposed on the second principal surface side of the plate-shaped member, and a fixing member configured to fix the frame member and the holding member to the plate-shaped member, the plate-shaped member further including a transparent peripheral edge portion disposed on an outside of the frame member.

公开(公告)号：US20170374733A1

公开(公告)日：2017-12-28

申请号：US15630157

申请日：2017-06-22

Applicant: JOLED INC.

Inventor： Shunsuke ITAKURA

IPC: H05K1/02 ,  H01L25/10 ,  H01L23/13 ,  H01L27/02 ,  H01L23/12 ,  H01L23/00

CPC classification number: H05K1/0216 ,  H01L23/12 ,  H01L23/13 ,  H01L24/73 ,  H01L25/105 ,  H01L27/0207 ,  H01L27/0248

Abstract: A mounting board includes: a first electronic component that includes first solder balls, one of the first solder balls being surrounded by at least three of the first solder balls; a first capacitor that includes a first power supply terminal and a first ground terminal; a second electronic component that includes second solder balls, each of the second solder balls not being surrounded by at least three of the second solder balls; and a second capacitor that includes a second power supply terminal and a second ground terminal. A distance from the first ground terminal to the first electronic component is less than or equal to a distance from the first power supply terminal to the first electronic component. A distance from the second power supply terminal to the second electronic component is less than or equal to a distance from the second ground terminal to the second electronic component.

公开(公告)号：US20160351120A1

公开(公告)日：2016-12-01

申请号：US15117235

申请日：2014-12-22

Applicant: JOLED INC.

Inventor： Shunsuke ITAKURA

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0251 ,  G09G2310/08 ,  G09G2320/0219 ,  G09G2320/0233 ,  G09G2320/043 ,  G09G2330/028

Abstract: A display device includes a plurality of pixels arranged in a matrix. Each of the pixels includes a light-emitting element, a capacitance element; a drive transistor which supplies, to the light-emitting element, a current corresponding to the amount of the electric charge accumulated in the capacitance element; a first switch transistor for pre-initializing the electric charge accumulated in the capacitance element; and a second switch transistor for, after the pre-initializing, further initializing the electric charge accumulated in the capacitance element. The display device further includes: a first voltage source which outputs a first voltage (Vref2) to the capacitance element when the first switch transistor is turned on; and a second voltage source which applies a second voltage (Vref1) to the capacitance element when the second switch transistor is turned on.

Abstract translation: 显示装置包括以矩阵排列的多个像素。 每个像素包括发光元件，电容元件; 驱动晶体管，向所述发光元件供给与所述电容元件中累积的电荷量对应的电流; 用于预先初始化在电容元件中累积的电荷的第一开关晶体管; 以及第二开关晶体管，用于在预初始化之后，进一步初始化电容元件中累积的电荷。 显示装置还包括：第一电压源，其在第一开关晶体管导通时向电容元件输出第一电压（Vref2）; 以及第二电压源，其在所述第二开关晶体管导通时向所述电容元件施加第二电压（Vref1）。

公开(公告)号：US20180103545A1

公开(公告)日：2018-04-12

申请号：US15719811

申请日：2017-09-29

Applicant: JOLED INC.

Inventor： Shunsuke ITAKURA

IPC: H05K1/14 ,  H05K1/18 ,  G09G3/3225

Abstract: A circuit substrate module includes: a plurality of substrates which are arranged in a matrix, and on at least some of which circuit components are mounted; a plurality of first flexible substrates each of which is arranged between two adjacent substrates in a row direction among the plurality of substrates, and connects the two adjacent substrates; and a plurality of second flexible substrates each of which is arranged between two adjacent substrates in a column direction among the plurality of substrates, and connects the two adjacent substrates.

公开(公告)号：US20180096929A1

公开(公告)日：2018-04-05

申请号：US15718619

申请日：2017-09-28

Applicant: JOLED INC.

Inventor： Shunsuke ITAKURA

IPC: H01L23/528 ,  H01L27/118 ,  H01L25/16 ,  H01L49/02 ,  H01L23/00 ,  G09G5/10

CPC classification number: H01L23/528 ,  G09G5/10 ,  G09G2330/021 ,  H01L23/50 ,  H01L24/17 ,  H01L25/16 ,  H01L25/18 ,  H01L27/11803 ,  H01L28/40 ,  H01L2224/1713 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/19041 ,  H01L2924/19105

Abstract: Provided is a semiconductor device that includes: an integrated circuit (IC) chip including a terminal array that is a matrix of terminals arranged in at least seven rows and at least seven columns, the terminals including a reference terminal to which a reference voltage is applied; a capacitor electrically connected to the reference terminal; and a substrate including one main surface as a mounting surface on which the IC chip and the capacitor are mounted. The IC chip is an application specific integrated circuit (ASIC) chip or a field-programmable gate array (FPGA) chip. The reference terminal is disposed at a position within three rows or three columns from an outer edge of the terminal array.