公开(公告)号：US20240201549A1

公开(公告)日：2024-06-20

申请号：US18540945

申请日：2023-12-15

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA ,  Kentaro KAWAI

IPC: G02F1/1362 ,  G02F1/1334 ,  G02F1/1339 ,  G02F1/1347

CPC classification number: G02F1/136286 ,  G02F1/1334 ,  G02F1/1339 ,  G02F1/13471

Abstract: A display device includes a first conductive layer arranged above a first substrate and extending in a first direction, a first insulating film arranged above the first conductive layer, a second conductive layer and a third conductive layer arranged above the first insulating film and extending in a second direction intersecting the first direction, a second insulating film arranged above the second conductive layer and the third conductive layer, a fourth conductive layer arranged above the second insulating film and extending in the second direction, and a spacer arranged in a second substrate arranged to face the first substrate.

公开(公告)号：US20230208658A1

公开(公告)日：2023-06-29

申请号：US18115796

申请日：2023-03-01

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA

IPC: H04L9/32

CPC classification number: H04L9/3278

Abstract: A detection device includes a pixel including a photodiode connected to a gate electrode of a first transistor, and a control circuit configured to control an operation of the pixel in a reset period (including a first and a second periods) for resetting the gate electrode, an exposure period for exposing the photo diode, and a read-out period (a fourth period) to read out a voltage associated with the exposure of the photodiode. The control circuit is configured to read out a first voltage during the first period, read out a second voltage during the second period after stopping a supply of a reset voltage to the gate electrode, read out a third voltage in the fourth period after the exposure period, output a difference value between the first and the second voltages as PUF-ID data and a difference value between the third and the second voltages as detection data.

公开(公告)号：US20210191206A1

公开(公告)日：2021-06-24

申请号：US17123434

申请日：2020-12-16

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA ,  Gen KOIDE

IPC: G02F1/1362

Abstract: A display device includes a first direction, a plurality of pixels arranged in a second direction intersecting the first direction, at least one scanning signal line connected to the plurality of pixels, a scanning signal line driving circuit connected to the scanning line, the scanning signal line driving circuit includes a switch for outputting a signal to the scanning signal line, a first power supply line for providing a first voltage to the switch, a second power supply line for providing a second voltage smaller than the first voltage to the switch, and the switch is provided between the first power supply line and the second power supply line, a line width of the second power supply line is 4 times the line width of the first power supply line or more and 40 times the line width of the first power supply line or less.

公开(公告)号：US20200251597A1

公开(公告)日：2020-08-06

申请号：US16779680

申请日：2020-02-03

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA ,  Hirotaka HAYASHI ,  Hitoshi TANAKA

IPC: H01L29/786 ,  G02F1/16766 ,  G02F1/167 ,  H01L49/02 ,  H01L27/12

Abstract: According to one embodiment, a semiconductor substrate includes a first basement, a gate line, a source line, an insulating film, a first pixel electrode, and a first transistor and a second transistor connected parallel at positions between the source line and the first pixel electrode. Each of a first semiconductor layer of the first transistor and a second semiconductor layer of the second transistor includes a first region, a second region, and a channel region. The first semiconductor layer and the second semiconductor layer are in contact with a first surface that is a surface of the insulating film on the source line side. The channel region of each of the first semiconductor layer and the second semiconductor layer wholly overlaps the gate line.

公开(公告)号：US20240264499A1

公开(公告)日：2024-08-08

申请号：US18426348

申请日：2024-01-30

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA

IPC: G02F1/1362 ,  G02F1/1368 ,  H01L27/12

CPC classification number: G02F1/136227 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124

Abstract: A display device includes a first conductive layer having a first region extending in a first direction and a second region intersecting the first region on a first substrate, a first insulating film arranged on the first conductive layer, an oxide semiconductor layer arranged along the second region on the first insulating film, a second conductive layer and a third conductive layer connected to the oxide semiconductor layer and arranged along the second region, a second insulating film arranged on the third conductive layer, and a pixel electrode arranged on the second insulating film, wherein the third conductive layer has a third region along the first direction and a fourth region along the second region, and the pixel electrode is connected to the third conductive layer in the third region via an opening in the second insulating film.

公开(公告)号：US20230251545A1

公开(公告)日：2023-08-10

申请号：US18166501

申请日：2023-02-09

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA

IPC: G02F1/16756 ,  G09G3/34 ,  G02F1/167 ,  G02F1/16766 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/16756 ,  G09G3/344 ,  G02F1/167 ,  G02F1/16766 ,  G02F1/136286 ,  G02F1/1368 ,  G09G2310/0202 ,  G09G2300/0426 ,  G09G2300/0852 ,  G02F2202/28 ,  G02F1/13439

Abstract: According to one embodiment, a display device includes a first substrate including a plurality of pixel electrodes that include a plurality of first pixel electrodes and a plurality of second pixels, and an inorganic insulating layer that covers the plurality of pixel electrodes, a second substrate including a counter-substrate opposed to the plurality of pixel electrodes, and an electrophoretic layer arranged between the first substrate and the second substrate.

公开(公告)号：US20230215957A1

公开(公告)日：2023-07-06

申请号：US18181572

申请日：2023-03-10

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA ,  Hirotaka HAYASHI ,  Hitoshi TANAKA

IPC: H01L29/786 ,  H01L27/12 ,  G02F1/16766 ,  G02F1/167

CPC classification number: H01L29/78696 ,  H01L27/124 ,  G02F1/16766 ,  H01L27/1255 ,  H01L28/60 ,  H01L29/78648 ,  G02F1/167 ,  H01L29/7869 ,  H01L27/1225

Abstract: According to one embodiment, a semiconductor substrate includes a first basement, a gate line, a source line, an insulating film, a first pixel electrode, and a first transistor and a second transistor connected parallel at positions between the source line and the first pixel electrode. Each of a first semiconductor layer of the first transistor and a second semiconductor layer of the second transistor includes a first region, a second region, and a channel region. The first semiconductor layer and the second semiconductor layer are in contact with a first surface that is a surface of the insulating film on the source line side. The channel region of each of the first semiconductor layer and the second semiconductor layer wholly overlaps the gate line.

公开(公告)号：US20220004757A1

公开(公告)日：2022-01-06

申请号：US17448386

申请日：2021-09-22

Applicant: Japan Display Inc.

Inventor： Masataka IKEDA

IPC: G06K9/00 ,  G06F3/044 ,  G06F3/041 ,  H04L9/32

Abstract: An information processing device comprises an electronic device, an averaging circuit acquiring output signals from the electronic device multiple times in a predetermined period and averaging the signals acquired multiple times, a memory circuit storing an averaged signal averaged by the averaging circuit and a PUF-ID extraction circuit generating a unique identifier based on the averaged signal.

公开(公告)号：US20250060641A1

公开(公告)日：2025-02-20

申请号：US18935704

申请日：2024-11-04

Applicant: Japan Display Inc.

Inventor： Kentaro KAWAI ,  Masataka IKEDA ,  Hirotaka HAYASHI ,  Yuuji OOMORI ,  Yoshihide OHUE

IPC: G02F1/1362 ,  G02F1/1334 ,  G02F1/1345 ,  G02F1/1368 ,  G09G3/36 ,  H01L27/12

Abstract: A display device includes a first pixel, a second pixel, and a third pixel arranged in a first direction in a display area arranged on a first substrate, a first source wiring, a second wiring, and a third wiring extending in the first direction, and connected to each of the first pixel to the third pixel, and a first gate wiring, a second gate wiring, and a third wiring intersecting the first direction, and connected to each of the first pixel to the third pixel. The first pixel includes a first transistor electrically connected to the first gate wiring and the first source wiring and a liquid crystal element electrically connected to the first transistor, the first pixel to the third pixel are arranged between the first source wiring and the third source wiring, and the second source wiring, and the first source wiring intersects the third source wiring.

公开(公告)号：US20210294170A1

公开(公告)日：2021-09-23

申请号：US17203771

申请日：2021-03-17

Applicant: Japan Display Inc.

Inventor： Gen KOIDE ,  Masataka IKEDA

IPC: G02F1/1362 ,  H01L27/12 ,  G02F1/1333

Abstract: According to one embodiment, a semiconductor substrate includes a signal line including a first area overlapping a first concave groove portion and a second area not overlapping the first concave groove portion. The signal line includes a first layer and a second layer. A first end portion of the first layer of the first area projects from a side surface of the second layer in a direction parallel to a plane of the first base. The first layer of the first area includes a first portion between the side surface of the second layer and the first end portion. The first portion is in contact with a side surface of the first concave groove portion, and the side surface of the second layer is covered with the first portion in the first concave groove portion.