Pattern Suppression in Logic for Wafer Inspection
    1.
    发明申请
    Pattern Suppression in Logic for Wafer Inspection 有权
    晶圆检测逻辑中的图案抑制

    公开(公告)号:US20150293035A1

    公开(公告)日:2015-10-15

    申请号:US14682822

    申请日:2015-04-09

    CPC classification number: G01N21/9501 G01N21/956 G01N2201/10

    Abstract: Methods and systems for detecting defects on a wafer are provided. One system includes an illumination subsystem configured to direct light to at least one spot on a wafer. The system also includes at least one element configured to block first portion(s) of light scattered from the at least one spot from reaching a detector while allowing second portion(s) of the light scattered from the at least one spot to be detected by the detector. The first portion(s) of the light are scattered from one or more patterned features in a logic region on the wafer. The second portion(s) of the light are not scattered from the one or more patterned features. The detector is not an imaging detector. The system further includes a computer subsystem configured to detect defects on the wafer based on output of the detector.

    Abstract translation: 提供了用于检测晶片上的缺陷的方法和系统。 一个系统包括被配置为将光引导到晶片上的至少一个点的照明子系统。 该系统还包括至少一个元件,其构造成阻挡从至少一个点散射的光的第一部分到达检测器,同时允许从至少一个点散射的光的第二部分被 检测器。 光的第一部分从晶片上的逻辑区域中的一个或多个图案特征散射。 光的第二部分不从一个或多个图案特征散射。 检测器不是成像检测器。 该系统还包括被配置为基于检测器的输出来检测晶片上的缺陷的计算机子系统。

    Pattern suppression in logic for wafer inspection
    2.
    发明授权
    Pattern suppression in logic for wafer inspection 有权
    晶圆检查逻辑中的图案抑制

    公开(公告)号:US09506873B2

    公开(公告)日:2016-11-29

    申请号:US14682822

    申请日:2015-04-09

    CPC classification number: G01N21/9501 G01N21/956 G01N2201/10

    Abstract: Methods and systems for detecting defects on a wafer are provided. One system includes an illumination subsystem configured to direct light to at least one spot on a wafer. The system also includes at least one element configured to block first portion(s) of light scattered from the at least one spot from reaching a detector while allowing second portion(s) of the light scattered from the at least one spot to be detected by the detector. The first portion(s) of the light are scattered from one or more patterned features in a logic region on the wafer. The second portion(s) of the light are not scattered from the one or more patterned features. The detector is not an imaging detector. The system further includes a computer subsystem configured to detect defects on the wafer based on output of the detector.

    Abstract translation: 提供了用于检测晶片上的缺陷的方法和系统。 一个系统包括被配置为将光引导到晶片上的至少一个点的照明子系统。 该系统还包括至少一个元件,其构造成阻挡从至少一个点散射的光的第一部分到达检测器,同时允许从至少一个点散射的光的第二部分被 检测器。 光的第一部分从晶片上的逻辑区域中的一个或多个图案特征散射。 光的第二部分不从一个或多个图案特征散射。 检测器不是成像检测器。 该系统还包括被配置为基于检测器的输出来检测晶片上的缺陷的计算机子系统。

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