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公开(公告)号：US20230206052A1
公开(公告)日：2023-06-29
申请号：US18146727
申请日：2022-12-27
Applicant: KOREA ELECTRONICS TECHNOLOGY INSTITUTE
Inventor： Dongyeob Shin , Yong Seok Lim
CPC classification number: G06N3/063 , G06F7/5443
Abstract: Provided are a systolic array structure and a device including the same. The systolic array structure includes a processing element (PE) array in which a plurality of PEs are connected. The systolic array structure performs a multiply and accumulate (MAC) operation by applying differential values as first and second inputs which are input to each of the PEs.
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