公开(公告)号：US20230031541A1

公开(公告)日：2023-02-02

申请号：US17967006

申请日：2022-10-17

Applicant: Kioxia Corporation

Inventor： Hiroyuki NAGASHIMA

IPC: G11C16/26 ,  G06F11/10 ,  G11C16/14 ,  G11C16/24 ,  G11C16/34 ,  G11C11/56 ,  G11C16/04 ,  G06F11/34

Abstract: According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.

公开(公告)号：US20240282389A1

公开(公告)日：2024-08-22

申请号：US18654302

申请日：2024-05-03

Applicant: Kioxia Corporation

Inventor： Hiroyuki NAGASHIMA

IPC: G11C16/26 ,  G06F11/10 ,  G06F11/34 ,  G11C11/56 ,  G11C16/04 ,  G11C16/14 ,  G11C16/24 ,  G11C16/34

CPC classification number: G11C16/26 ,  G06F11/1048 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/14 ,  G11C16/24 ,  G11C16/34 ,  G11C16/3418 ,  G06F11/3466 ,  G06F2201/88 ,  G11C16/0483

Abstract: According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.