公开(公告)号：US10796443B2

公开(公告)日：2020-10-06

申请号：US16162909

申请日：2018-10-17

Applicant: Kneron, Inc.

Inventor： Ming-Zhe Jiang ,  Yuan Du ,  Li Du ,  Jie Wu ,  Jun-Jie Su

IPC: G06T7/73 ,  G06T7/55 ,  G06K9/62 ,  G06K9/38 ,  H04N5/33 ,  H04N5/91 ,  H04N5/765 ,  H04N13/128

Abstract: An image depth decoder includes an NIR image buffer, a reference image ring buffer and a pattern matching engine. The NIR image buffer stores an NIR image inputted by a stream. The reference image ring buffer stores a reference image inputted by a stream. The pattern matching engine is coupled to the NIR image buffer and the reference image ring buffer, and performs a depth computation according to the NIR image and the reference image to output at least one depth value.

公开(公告)号：US10516415B2

公开(公告)日：2019-12-24

申请号：US15893294

申请日：2018-02-09

Applicant: Kneron, Inc.

Inventor： Li Du ,  Yuan Du ,  Jun-Jie Su ,  Ming-Zhe Jiang

IPC: H03M7/30 ,  H03H21/00 ,  G06F17/15 ,  G06N3/04

Abstract: A method for compressing multiple original convolution parameters into a convolution operation chip includes steps of: determining a range of the original convolution parameters; setting an effective bit number for the range; setting a representative value, wherein the representative value is within the range; calculating differential values between the original convolution parameters and the representative value; quantifying the differential values to a minimum effective bit to obtain a plurality of compressed convolution parameters; and transmitting the effective bit number, the representative value and the compressed convolution parameters to the convolution operation chip.