公开(公告)号：US20220352423A1

公开(公告)日：2022-11-03

申请号：US17621104

申请日：2020-06-24

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY

Inventor： Yijing CHEN ,  Li ZHANG ,  Kenneth Eng Kian LEE ,  Eugene A. FITZGERALD

IPC: H01L33/38 ,  H01L33/60 ,  H01L25/075 ,  H01L33/00 ,  H01L33/62

Abstract: An integrated structure for an optoelectronic device and a method of fabricating an integrated structure for an optoelectronic device. The method comprises the steps of forming a plurality of epitaxial layers for optical elements on an epitaxial growth substrate, wherein the epitaxial layers are based on a material system different from complementary metal-oxide-semiconductor, CMOS; providing a handle wafer; performing a first dielectric bonding between the epitaxial growth substrate and the handle wafer such that an order of the epitaxial layers for the optical elements is reversed on the handle wafer compared to on the epitaxial growth substrate; removing the epitaxial growth substrate to expose one of the epitaxial layers on the handle wafer; processing the exposed one of the epitaxial layers for providing a common electrode layer for a first contact of each of the optical elements in the optoelectronic device; providing a CMOS integrated circuit, IC, wafer comprising a driver circuit for the optoelectronic device; and performing a second dielectric bonding between the handle wafer and the IC wafer such that an order of the epitaxial layers for the optical elements is reversed on the IC wafer compared to on the handle wafer.

公开(公告)号：US20220246670A1

公开(公告)日：2022-08-04

申请号：US17622097

申请日：2020-06-24

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY

Inventor： Yijing CHEN ,  Li ZHANG ,  Kenneth Eng Kian LEE ,  Eugene A. FITZGERALD

IPC: H01L27/15 ,  H01L33/58 ,  H01L33/60 ,  H01L33/00

Abstract: An integrated structure for an optoelectronic device and a method of fabricating an integrated structure for an optoelectronic device. The method comprises the steps of providing a complementary metal-oxide-semiconductor, CMOS, backplane comprising a driver circuit for the optoelectronic device; and providing a plurality of optical elements on the CMOS backplane, wherein the plurality of optical elements are based on a material system different from CMOS and are disposed in different device layers; wherein a first bonding dielectric is provided between the CMOS backplane and a first one of the different device layers for monolithic integration; and wherein a second bonding dielectric is provided between respective ones of the different device layers for monolithic integration, the second bonding dielectric being transparent.

公开(公告)号：US20190355766A1

公开(公告)日：2019-11-21

申请号：US16477095

申请日：2018-01-12

Applicant: Massachusetts Institute of Technology ,  Nanyang Technological University ,  National University of Singapore

Inventor： Li ZHANG ,  Eng Kian, Kenneth LEE ,  Soo Jin CHUA ,  Eugene A. FITZGERALD ,  Siau Ben CHIAH ,  Joseph Sylvester CHANG ,  Yong QU ,  Wei SHU ,  Kwang Hong LEE ,  Bing WANG

IPC: H01L27/12 ,  H01L25/00 ,  H01L21/8238 ,  H01L33/00

Abstract: A method of forming a multilayer structure for a pixelated display and a multilayer structure for a pixelated display is provided. The method comprising providing a first wafer comprising first layers disposed over a first substrate, said first layers comprising non-silicon based semiconductor material for forming p-n junction LEDs (light emitting devices); providing a second partially processed wafer comprising silicon-based CMOS (Complementary Metal Oxide Semiconductor) devices formed in second layers disposed over a second substrate, said CMOS devices for controlling the LEDs; and bonding the first and second wafers to form a composite wafer via a double-bonding transfer process.

公开(公告)号：US20200052141A1

公开(公告)日：2020-02-13

申请号：US16343075

申请日：2017-10-12

Applicant: Khalifa University of Science and Technology ,  Massachusetts Institute of Technology

Inventor： Sabina ABDUL HADI ,  Ammar Munir NAYFEH ,  Eugene A. FITZGERALD

IPC: H01L31/0725 ,  H01L31/074 ,  H01L31/043

Abstract: A multi-junction solar cell includes a plurality of photovoltaic cell layers that are electrically connected and stacked to define upper and lower subcells having at least one step difference therebetween that exposes portions of the lower subcell such that, responsive to incident illumination, a current density of the exposed portions of the lower subcell is greater than that of portions thereof having the upper subcell thereon. Related devices and fabrication methods are also discussed.

公开(公告)号：US20190035628A1

公开(公告)日：2019-01-31

申请号：US16071654

申请日：2017-01-19

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY ,  NATIONAL UNIVERSITY OF SINGAPORE ,  NANYANG TECHNOLOGICAL UNIVERSITY

Inventor： Li ZHANG ,  Kwang Hong LEE ,  Shuyu BAO ,  Eng Kian Kenneth LEE ,  Eugene A. FITZGERALD ,  Soo Jin CHUA ,  Chuan Seng TAN

IPC: H01L21/02

Abstract: Method and structure for reducing substrate fragility. In one embodiment, a substrate for metamorphic epitaxy of a material film is provided, the substrate comprising a passivation layer defining a growth window for the material film on a deposition surface of the substrate, the growth window being laterally spaced from an edge of the substrate.