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公开(公告)号:US20250112166A1
公开(公告)日:2025-04-03
申请号:US18892518
申请日:2024-09-22
Applicant: MEDIATEK INC.
Inventor: Pei-Haw Tsao , Te-Chi Wong
Abstract: A flip-chip package includes a substrate having a bond pad in a die-mounting area of the substrate. A DRAM die is mounted on the die-mounting area of the substrate in a flip chip fashion. The DRAM die includes an input/output (I/O) pad on its active surface and the I/O pad is electrically coupled to the t bond pad through a connecting element. The bond pad has a diameter that is smaller than a diameter of the I/O pad. A SoC die is mounted on the substrate in a flip chip fashion. The DRAM die and the SoC die are mounted on the substrate in a side-by-side manner.
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公开(公告)号:US20240243098A1
公开(公告)日:2024-07-18
申请号:US18542762
申请日:2023-12-17
Applicant: MEDIATEK INC.
Inventor: Pei-Haw Tsao , Te-Chi Wong
IPC: H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/538 , H10B80/00
CPC classification number: H01L25/0655 , H01L23/3185 , H01L23/49816 , H01L23/5385 , H01L23/562 , H01L24/16 , H01L24/32 , H01L24/73 , H10B80/00 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204
Abstract: A semiconductor package includes a package substrate, an interposer on and electrically connected to the package substrate, a central logic die disposed on and electrically connected to the interposer, peripheral function dies disposed on and electrically connected to the interposer and located in proximity to the central logic die, and at least one dummy die disposed between the central logic die and the peripheral function dies so as to form a rectangular shaped die arrangement. The at least one dummy die is disposed at a corner position of the rectangular shaped die arrangement.
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公开(公告)号:US20240178159A1
公开(公告)日:2024-05-30
申请号:US18502105
申请日:2023-11-06
Applicant: MEDIATEK INC.
Inventor: Pei-Haw Tsao , Te-Chi Wong
IPC: H01L23/00 , H01L23/31 , H01L23/498
CPC classification number: H01L23/562 , H01L23/3185 , H01L23/3192 , H01L23/49822 , H01L23/49816 , H01L24/20 , H01L2224/215 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01074 , H01L2924/04941
Abstract: A coreless substrate package includes a coreless substrate; a package device mounted on a coreless substrate; an underfill material filling into a space between the package device and the coreless substrate; a stiffener ring disposed on a top surface of the coreless substrate along perimeter of the coreless substrate; and a gap fill material disposed in a gap between the stiffener ring and the package device.
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