公开(公告)号：US20240036753A1

公开(公告)日：2024-02-01

申请号：US17877240

申请日：2022-07-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Wai Leong Chin ,  Francis Chee Khai Chew ,  Trismardawi Tanadi ,  Chun Sum Yeung ,  Lawrence Dumalag ,  Ekamdeep Singh

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0653 ,  G06F3/0604 ,  G06F3/0679

Abstract: A processing device in a memory sub-system determines whether a media endurance metric associated with a memory block of a memory device satisfies one or more conditions. In response to the one or more conditions being satisfied, a temperature of the memory block is compared to a threshold temperature range. In response to determining the temperature of the memory block is within the threshold temperature range, the processing device causes execution of a wordline leakage test of a wordline group of a set of wordline groups of the memory block. A result of the wordline leakage test of the target wordline group is determined and an action is executed based on the result of the wordline leakage test.

公开(公告)号：US20240071528A1

公开(公告)日：2024-02-29

申请号：US17897441

申请日：2022-08-29

Applicant: Micron Technology, Inc.

Inventor： Robert W. Mason ,  Scott Anthony Stoller ,  Pitamber Shukla ,  Ekamdeep Singh

IPC: G11C16/34 ,  G11C16/10

CPC classification number: G11C16/3459 ,  G11C16/102 ,  G11C16/3495

Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising performing a set of write operations on a first block in a first plane of the memory device and on a second block in a second plane of the memory device, performing a program verification check on the first block, responsive to determining that the first block fails the program verification check, incrementing a counter value associated with the second block; responsive to the counter value satisfying a threshold criterion, performing a failure verification operation on the second block, and responsive to determining that the second block fails the failure verification operation, retiring the second block.

公开(公告)号：US12293795B2

公开(公告)日：2025-05-06

申请号：US17897441

申请日：2022-08-29

Applicant: Micron Technology, Inc.

Inventor： Robert W. Mason ,  Scott Anthony Stoller ,  Pitamber Shukla ,  Ekamdeep Singh

IPC: G06F3/06 ,  G11C16/10 ,  G11C16/34

Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising performing a set of write operations on a first block in a first plane of the memory device and on a second block in a second plane of the memory device, performing a program verification check on the first block, responsive to determining that the first block fails the program verification check, incrementing a counter value associated with the second block; responsive to the counter value satisfying a threshold criterion, performing a failure verification operation on the second block, and responsive to determining that the second block fails the failure verification operation, retiring the second block.

公开(公告)号：US20240338139A1

公开(公告)日：2024-10-10

申请号：US18748715

申请日：2024-06-20

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Wai Leong Chin ,  Francis Chee Khai Chew ,  Trismardawi Tanadi ,  Chun Sum Yeung ,  Lawrence Dumalag ,  Ekamdeep Singh

IPC: G06F3/06 ,  G06F12/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0653 ,  G06F3/0679 ,  G06F12/0646 ,  G06F2212/7202 ,  G06F2212/7204 ,  G06F2212/7206

Abstract: A memory sub-system causing execution of a first wordline leakage test of a first wordline group of a set of wordline groups of a memory block in response to determining a temperature of the memory block is within a threshold temperature range. A first result of the first wordline leakage test is determined. A second wordline leakage test of a second wordline group is caused to be executed and a second result is determined. A determination is made that the first result of the first wordline leakage test of the first wordline group satisfies a first condition. A determination is made that the second result of the second wordline leakage test of the second wordline group satisfies a second condition. In response to satisfaction of the conditions, an action is executed.

公开(公告)号：US12045482B2

公开(公告)日：2024-07-23

申请号：US17877240

申请日：2022-07-29

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Wai Leong Chin ,  Francis Chee Khai Chew ,  Trismardawi Tanadi ,  Chun Sum Yeung ,  Lawrence Dumalag ,  Ekamdeep Singh

IPC: G06F3/06 ,  G06F12/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0653 ,  G06F3/0679 ,  G06F12/0646 ,  G06F2212/7202 ,  G06F2212/7204 ,  G06F2212/7206

Abstract: A processing device in a memory sub-system determines whether a media endurance metric associated with a memory block of a memory device satisfies one or more conditions. In response to the one or more conditions being satisfied, a temperature of the memory block is compared to a threshold temperature range. In response to determining the temperature of the memory block is within the threshold temperature range, the processing device causes execution of a wordline leakage test of a wordline group of a set of wordline groups of the memory block. A result of the wordline leakage test of the target wordline group is determined and an action is executed based on the result of the wordline leakage test.

公开(公告)号：US20230367680A1

公开(公告)日：2023-11-16

申请号：US18143937

申请日：2023-05-05

Applicant: Micron Technology, Inc.

Inventor： Lu Tong ,  Ashish Ghai ,  Chai Chuan Yao ,  Ekamdeep Singh ,  Lakshmi Kalpana Vakati ,  Sheng Huang Lee ,  Matthew Ivan Warren ,  Dheeraj Srinivasan ,  Jeffrey Ming-Hung Tsai

IPC: G06F11/20 ,  G06F3/06

CPC classification number: G06F11/2023 ,  G06F3/0617 ,  G06F3/064 ,  G06F3/0673 ,  G06F2201/805

Abstract: Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. In response to determining at least a portion of a first memory block passed a program verify operation associated with a last programming level of the set of programming levels, the control logic executes a first program sub-operation to terminate the programming operation with respect to a first subset of one or more memory planes of the set of memory planes that passed the program verify operation associated with the last programming level and identify a second subset of one or more memory planes that failed the program verify operation associated with the last programming level. The control logic executes a second program sub-operation to apply a trim set to the second subset of one or more memory planes that failed the program verify operation of the last programming level.

公开(公告)号：US20250110841A1

公开(公告)日：2025-04-03

申请号：US18980708

申请日：2024-12-13

Applicant: Micron Technology, Inc.

Inventor： Lu Tong ,  Ashish Ghai ,  Chai Chuan Yao ,  Ekamdeep Singh ,  Lakshmi Kalpana Vakati ,  Sheng Huang Lee ,  Matthew Ivan Warren ,  Dheeraj Srinivasan ,  Jeffrey Ming-Hung Tsai

IPC: G06F11/20 ,  G06F3/06

Abstract: Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. The control logic identify a subset of memory blocks of one or more memory planes that pass a program count operation associated with a last programming level of the set of programming levels. The control logic further terminates execution of the programming operation on the one or more memory planes associated with the subset of memory blocks.

公开(公告)号：US12204422B2

公开(公告)日：2025-01-21

申请号：US18143937

申请日：2023-05-05

Applicant: Micron Technology, Inc.

Inventor： Lu Tong ,  Ashish Ghai ,  Chai Chuan Yao ,  Ekamdeep Singh ,  Lakshmi Kalpana Vakati ,  Sheng Huang Lee ,  Matthew Ivan Warren ,  Dheeraj Srinivasan ,  Jeffrey Ming-Hung Tsai

IPC: G06F11/20 ,  G06F3/06

Abstract: Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. In response to determining at least a portion of a first memory block passed a program verify operation associated with a last programming level of the set of programming levels, the control logic executes a first program sub-operation to terminate the programming operation with respect to a first subset of one or more memory planes of the set of memory planes that passed the program verify operation associated with the last programming level and identify a second subset of one or more memory planes that failed the program verify operation associated with the last programming level. The control logic executes a second program sub-operation to apply a trim set to the second subset of one or more memory planes that failed the program verify operation of the last programming level.

公开(公告)号：US20240220110A1

公开(公告)日：2024-07-04

申请号：US18540716

申请日：2023-12-14

Applicant: Micron Technology, Inc.

Inventor： Sheng-Huang Lee ,  Lu Tong ,  Lawrence Celso Miranda ,  Lakshmi Kalpana Vakati ,  Ekamdeep Singh ,  Ashish Ghai

IPC: G06F3/06 ,  G06F11/07

CPC classification number: G06F3/061 ,  G06F3/0653 ,  G06F3/0679 ,  G06F11/073 ,  G06F11/0754

Abstract: Control logic in a memory device identifies a segment of the plurality of segments of a memory array of a memory device, and determines a health status for the segment from a plurality of possible health statuses, the plurality of possible health statuses comprising three or more health statuses. The control logic further provides the health status for the segment to a memory sub-system controller associated with the memory device, wherein the memory sub-system controller is to perform a corresponding action with respect to the segment based on the health status, and wherein the corresponding action is different for each of the plurality of possible health statuses.