公开(公告)号：US20240111690A1

公开(公告)日：2024-04-04

申请号：US18373381

申请日：2023-09-27

Applicant: MONTAGE TECHNOLOGY CO., LTD.

Inventor： Xiaoyan LI ,  Zhaohui DU ,  Men LONG ,  Yang CHAO ,  Dajiang ZHONG ,  Zhixin TIAN

IPC: G06F12/14 ,  G06F7/58

CPC classification number: G06F12/1408 ,  G06F7/584 ,  G06F12/1441

Abstract: This application relates to the field of memory technology, in particular to a method and a system for remapping a row address on a multichannel DIMM. The method is applied to a memory controller, comprising: receiving a first read/write access address and extracting a first channel row address from the first read/write access address; encrypting and mapping the first channel row address through a key-based mapping method to obtain a second channel row address that corresponds to the first channel row address within a predetermined address range; forming a second read/write access address based on the second channel row address and unextracted address information in the first read/write access address, and performing read/write access to the DIMM based on the second read/write access address. The present application can alleviate side channel attack without causing degradation of read/write performance.

公开(公告)号：US20230222231A1

公开(公告)日：2023-07-13

申请号：US18148628

申请日：2022-12-30

Applicant: MONTAGE TECHNOLOGY CO., LTD.

Inventor： Dajiang ZHONG ,  Zhaohui DU

IPC: G06F21/60 ,  G06F21/85

CPC classification number: G06F21/602 ,  G06F21/85

Abstract: The application discloses a data encryption and decryption system and method. The system includes a host system, a sequencer, a hardware processor, multiple direct memory access modules, and multiple cryptography engines, the cryptography engine comprises an input buffer, an output buffer, a symmetric encryption/decryption algorithm module and a digest algorithm module. The host system determines encryption/decryption calculation method and/or digest calculation method, and generates corresponding encryption/decryption calculation commands and/or digest calculation commands. The sequencer analyzes the encryption/decryption calculation commands and/or digest calculation command to generate control flow commands, and controls one or more of the multiple direct memory access modules via the control flow commands to input data to be encrypted/decrypted into the input buffer of one or more cryptography engines. The hardware processor controls the symmetric encryption/decryption algorithm module to perform encryption/decryption calculations on the data to be encrypted/decrypted according to the encryption/decryption calculation commands, and/or, controls the digest algorithm module to perform digest calculations on data to be encrypted/decrypted according to the digest calculation commands, and sends calculation results to the host system by the direct memory access module.

公开(公告)号：US20240030937A1

公开(公告)日：2024-01-25

申请号：US18224199

申请日：2023-07-20

Applicant: MONTAGE TECHNOLOGY CO., LTD.

Inventor： Xiaoyan LI ,  Zhaohui DU ,  Men LONG ,  Yang CHAO ,  Dajiang ZHONG

IPC: H03M7/30 ,  G06F11/10

CPC classification number: H03M7/6041 ,  G06F11/1044

Abstract: A data compression method includes: storing data to be written into a first address and a second address into a data buffer in response to a data write request to the first address and the second address of a memory module from a host; according to a relationship between the first address and the second address, selecting a compression scheme from pre-configured compression schemes, and attempting to compress the data to be written into the first address and the second address into compressed data that can be stored into either the first address or the second address by using a pre-defined compression method, if the attempt to compress successes, storing the compressed data into the first address or the second address of the memory module, and identifying the compressed data by using redundant ECC bits to form first identification information.

公开(公告)号：US20230153153A1

公开(公告)日：2023-05-18

申请号：US18056242

申请日：2022-11-16

Applicant: MONTAGE TECHNOLOGY CO., LTD.

Inventor： Yanjia KE ,  Zhaohui DU ,  Wenbo QU

IPC: G06F9/48 ,  G06F9/445 ,  G06F9/30

CPC classification number: G06F9/4881 ,  G06F9/44505 ,  G06F9/3004

Abstract: A task processing apparatus and a task processing method are provided. The task processing apparatus is coupled to a host apparatus, and includes: a controller configured to query whether there is a data processing task to be executed and trigger execution of the data processing task; at least one data processing engine configured to process operation data corresponding to the data processing task according to a configured working mode, and generate a data processing result; and at least one scheduler configured to: receive a task descriptor of the data processing task from the host apparatus; configure the working mode of the data processing engine based on the task descriptor; control transmission of the operation data corresponding to the data processing task from the host apparatus to the data processing engine; and control transmission of the data processing result from the data processing engine to the host apparatus.