公开(公告)号：US20200234785A1

公开(公告)日：2020-07-23

申请号：US16744288

申请日：2020-01-16

Applicant: Melexis Technologies NV

Inventor： Andrii KYSELOV ,  Samuel PREVOT ,  Vincenzo SACCO ,  Mitchell NORCROSS

IPC: G11C29/38 ,  G01S7/4861 ,  H03M1/12

Abstract: A toggled buffer memory apparatus comprising a first memory block (134) arranged to support the first memory function over a first time frame and to toggle to support the second memory function over a second time frame. A second memory block (136) is also arranged to support the second memory function over the first time frame and to toggle to support the first memory function over the second time frame. A data input and a self-test block are respectively operably and selectively coupled to the first and second memory blocks. A controller is arranged to control toggling of the memory blocks (134, 136) which are each arranged to toggle between the first and second memory functions in respect of time frames subsequent to the second time frame. The self-test block is arranged to test the first memory block subsequent to the first memory block performing the first memory function and prior to toggling to perform the second memory function, and to test the second memory block subsequent to the second memory block performing the first memory function and prior to toggling to perform the second memory function.