公开(公告)号：US20240419338A1

公开(公告)日：2024-12-19

申请号：US18749391

申请日：2024-06-20

Applicant: Micron Technology, Inc.

Inventor： Angelo Visconti ,  Jahanshir Javanifard ,  Daniele Vimercati

IPC: G06F3/06

Abstract: Methods, systems, and devices for data masking for memory are described. A memory device may set multiple data masking flags for associated memory array(s) at power-up. Each data masking flag may be associated with a respective page of memory cells and may indicate whether the data stored in the respective page is masked data, or whether the data is new, unmasked data. Data existing at a previous power-down may be masked until an initial write or activate command has been performed on the page after power-up, where the initial write or activate command may result in writing masked data, write data, or a combination thereof to the page. After previously stored data is overwritten to a page, the flag associated with the page may be reset, which may indicate that data stored at the page is available to be read.

公开(公告)号：US10431281B1

公开(公告)日：2019-10-01

申请号：US16104711

申请日：2018-08-17

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Daniele Vimercati ,  Jahanshir Javanifard

IPC: G11C11/22

Abstract: Methods, systems, and devices for section-based data protection in a memory device are described. In one example, a memory device may include a set memory sections each having memory cells configured to be selectively coupled with access lines of the respective memory section. A method of operating the memory device may include selecting at least one of the sections for a voltage adjustment operation based on a determined value of a timer, and performing the voltage adjustment operation on the selected section by activating each of a plurality of word lines of the selected section. The voltage adjustment operation may include applying an equal voltage to opposite terminals of the memory cells, which may allow built-up charge, such as leakage charge accumulating from access operations of the selected memory section, to dissipate from the memory cells of the selected section.

公开(公告)号：US11562805B2

公开(公告)日：2023-01-24

申请号：US17097753

申请日：2020-11-13

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Jahanshir Javanifard ,  Duane R. Mills

IPC: G11C11/22 ,  G11C29/44 ,  G11C11/408

Abstract: Methods, systems, and devices for speculative memory section selection are described. Defective memory components in one memory section may be repaired using repair components in another memory section. Speculative selection of memory sections may be enabled, whereby access lines in multiple memory sections may be selected when a memory command indicating an address in one memory section is received. While the access lines in the multiple memory sections are selected, a determination of whether repair components in another memory section are to be accessed is performed. Based on the determination, the access line in one of the memory sections may be maintained and the access lines in the other memory sections may be deselected.

公开(公告)号：US10855295B2

公开(公告)日：2020-12-01

申请号：US16859786

申请日：2020-04-27

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Daniele Vimercati ,  Jahanshir Javanifard

IPC: H03L7/181 ,  H03L7/193 ,  H03L7/099 ,  H03K5/13 ,  H03L7/08 ,  H03K21/10

Abstract: Methods, systems, and devices for section-based data protection in a memory device are described. In one example, a memory device may include a set memory sections each having memory cells configured to be selectively coupled with access lines of the respective memory section. A method of operating the memory device may include selecting at least one of the sections for a voltage adjustment operation based on a determined value of a timer, and performing the voltage adjustment operation on the selected section by activating each of a plurality of word lines of the selected section. The voltage adjustment operation may include applying an equal voltage to opposite terminals of the memory cells, which may allow built-up charge, such as leakage charge accumulating from access operations of the selected memory section, to dissipate from the memory cells of the selected section.

公开(公告)号：US20200259497A1

公开(公告)日：2020-08-13

申请号：US16859786

申请日：2020-04-27

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Daniele Vimercati ,  Jahanshir Javanifard

IPC: H03L7/193 ,  H03L7/099 ,  H03K21/10 ,  H03L7/08 ,  H03K5/13

Abstract: Methods, systems, and devices for section-based data protection in a memory device are described. In one example, a memory device may include a set memory sections each having memory cells configured to be selectively coupled with access lines of the respective memory section. A method of operating the memory device may include selecting at least one of the sections for a voltage adjustment operation based on a determined value of a timer, and performing the voltage adjustment operation on the selected section by activating each of a plurality of word lines of the selected section. The voltage adjustment operation may include applying an equal voltage to opposite terminals of the memory cells, which may allow built-up charge, such as leakage charge accumulating from access operations of the selected memory section, to dissipate from the memory cells of the selected section.

公开(公告)号：US20230350582A1

公开(公告)日：2023-11-02

申请号：US17730777

申请日：2022-04-27

Applicant: Micron Technology, Inc.

Inventor： Angelo Visconti ,  Jahanshir Javanifard ,  Daniele Vimercati

IPC: G06F3/06

CPC classification number: G06F3/0623 ,  G06F3/0655 ,  G06F3/0679

Abstract: Methods, systems, and devices for data masking for memory are described. A memory device may set multiple data masking flags for associated memory array(s) at power-up. Each data masking flag may be associated with a respective page of memory cells and may indicate whether the data stored in the respective page is masked data, or whether the data is new, unmasked data. Data existing at a previous power-down may be masked until an initial write or activate command has been performed on the page after power-up, where the initial write or activate command may result in writing masked data, write data, or a combination thereof to the page. After previously stored data is overwritten to a page, the flag associated with the page may be reset, which may indicate that data stored at the page is available to be read.

公开(公告)号：US20210134386A1

公开(公告)日：2021-05-06

申请号：US17097753

申请日：2020-11-13

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Jahanshir Javanifard ,  Duane R. Mills

IPC: G11C29/44 ,  G11C11/408 ,  G11C11/22

Abstract: Methods, systems, and devices for speculative memory section selection are described. Defective memory components in one memory section may be repaired using repair components in another memory section. Speculative selection of memory sections may be enabled, whereby access lines in multiple memory sections may be selected when a memory command indicating an address in one memory section is received. While the access lines in the multiple memory sections are selected, a determination of whether repair components in another memory section are to be accessed is performed. Based on the determination, the access line in one of the memory sections may be maintained and the access lines in the other memory sections may be deselected.

公开(公告)号：US10665285B2

公开(公告)日：2020-05-26

申请号：US16536078

申请日：2019-08-08

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Daniele Vimercati ,  Jahanshir Javanifard

IPC: G11C11/22

Abstract: Methods, systems, and devices for section-based data protection in a memory device are described. In one example, a memory device may include a set memory sections each having memory cells configured to be selectively coupled with access lines of the respective memory section. A method of operating the memory device may include selecting at least one of the sections for a voltage adjustment operation based on a determined value of a timer, and performing the voltage adjustment operation on the selected section by activating each of a plurality of word lines of the selected section. The voltage adjustment operation may include applying an equal voltage to opposite terminals of the memory cells, which may allow built-up charge, such as leakage charge accumulating from access operations of the selected memory section, to dissipate from the memory cells of the selected section.

公开(公告)号：US20200058342A1

公开(公告)日：2020-02-20

申请号：US16536078

申请日：2019-08-08

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Daniele Vimercati ,  Jahanshir Javanifard

IPC: G11C11/22

Abstract: Methods, systems, and devices for section-based data protection in a memory device are described. In one example, a memory device may include a set memory sections each having memory cells configured to be selectively coupled with access lines of the respective memory section. A method of operating the memory device may include selecting at least one of the sections for a voltage adjustment operation based on a determined value of a timer, and performing the voltage adjustment operation on the selected section by activating each of a plurality of word lines of the selected section. The voltage adjustment operation may include applying an equal voltage to opposite terminals of the memory cells, which may allow built-up charge, such as leakage charge accumulating from access operations of the selected memory section, to dissipate from the memory cells of the selected section.

公开(公告)号：US12050784B2

公开(公告)日：2024-07-30

申请号：US17730777

申请日：2022-04-27

Applicant: Micron Technology, Inc.

Inventor： Angelo Visconti ,  Jahanshir Javanifard ,  Daniele Vimercati

IPC: G06F3/06

CPC classification number: G06F3/0623 ,  G06F3/0655 ,  G06F3/0679

Abstract: Methods, systems, and devices for data masking for memory are described. A memory device may set multiple data masking flags for associated memory array(s) at power-up. Each data masking flag may be associated with a respective page of memory cells and may indicate whether the data stored in the respective page is masked data, or whether the data is new, unmasked data. Data existing at a previous power-down may be masked until an initial write or activate command has been performed on the page after power-up, where the initial write or activate command may result in writing masked data, write data, or a combination thereof to the page. After previously stored data is overwritten to a page, the flag associated with the page may be reset, which may indicate that data stored at the page is available to be read.