公开(公告)号：US11625313B2

公开(公告)日：2023-04-11

申请号：US17237893

申请日：2021-04-22

Applicant: Microsoft Technology Licensing, LLC

Inventor： Danny Chen ,  James D Laflen ,  Colin Mical Francis ,  Steven John Pratschner

IPC: G06F9/44 ,  G06F11/36

Abstract: A computing device is provided, including a processor configured to execute an application-under-test including a plurality of tasks. Each task may be executed in one or more task instances. The processor may determine respective performance data for the one or more task instances of each task. The processor may output, for display on a display, a graphical user interface (GUI) including a statistical representation of the performance data. The processor may receive, at the GUI, a selection of a task executed in a plurality of selected task instances in the application-under-test. The selected task instances may be executed in selected task execution time intervals that are at least partially non-contiguous in time. The processor may generate an aggregated view of the corresponding performance data for the selected task instances aggregated over the selected task execution time intervals. The processor may output the aggregated view for display at the GUI.

公开(公告)号：US10108528B2

公开(公告)日：2018-10-23

申请号：US15249245

申请日：2016-08-26

Applicant: Microsoft Technology Licensing, LLC

Inventor： Jay Krell ,  HoYuen Chau ,  Allan James Murphy ,  Danny Chen ,  Steven Pratschner ,  Hoi Huu Vo

IPC: G06F9/44 ,  G06F11/36

Abstract: High-performance tracing can be achieved for an input program having a plurality of instructions. Techniques such as executable instruction transcription can enable execution of a plurality of instructions at a time via a run buffer. Execution information can be extracted via run buffer execution. Fidelity of execution can be preserved by executing instructions on the target processor. Other features, such as an executable extraction instruction ensemble, branch interpretation, and relative address compensation can be implemented. High quality instruction tracing can thus be achieved without the usual performance penalties.

公开(公告)号：US11720394B2

公开(公告)日：2023-08-08

申请号：US17307358

申请日：2021-05-04

Applicant: Microsoft Technology Licensing, LLC

Inventor： Andrew Heth Farrier ,  Danny Chen

IPC: G06F9/44 ,  G06F9/46 ,  G06F11/30 ,  G06F11/32 ,  G06F11/34

CPC classification number: G06F9/461 ,  G06F11/302 ,  G06F11/323 ,  G06F11/3495

Abstract: The discussion relates to automatically providing information about what code sequences contribute to a length of time a program takes to execute. One example can collect context switch and ready thread event tracing data from a program over a period of interest and identify time blocks of program threads from the period of interest. The example can distinguish individual time blocks that contribute to execution time for the period of interest from other individual time blocks that do not contribute to the execution time.

公开(公告)号：US12298875B2

公开(公告)日：2025-05-13

申请号：US17837507

申请日：2022-06-10

Applicant: Microsoft Technology Licensing, LLC

Inventor： Danny Chen ,  Colin M. Francis ,  Eric M. Vaughn

IPC: G06F11/36 ,  G06F9/38 ,  G06F9/54 ,  G06F11/30 ,  G06F9/30 ,  G06F11/34 ,  G06F11/362

Abstract: This document relates to memory access profiling. One example relates to a method or technique that can include obtaining samples collected when executing an application, the samples comprising sampled register values that were present in one or more registers of a processor when the samples were collected. The method or technique can also include identifying sampled instructions of the application that were executing when the samples were collected and other instructions of the application. The method or technique can also include evaluating the sampled instructions and one or more of the other instructions using the sampled register values to identify memory accesses by the application. The method or technique can also include outputting the identified memory accesses.

公开(公告)号：US20180060212A1

公开(公告)日：2018-03-01

申请号：US15249245

申请日：2016-08-26

Applicant: Microsoft Technology Licensing, LLC

Inventor： Jay Krell ,  HoYuen Chau ,  Allan James Murphy ,  Danny Chen ,  Steven Pratschner ,  Hoi Huu Vo

IPC: G06F11/36

CPC classification number: G06F11/3636

Abstract: High-performance tracing can be achieved for an input program having a plurality of instructions. Techniques such as executable instruction transcription can enable execution of a plurality of instructions at a time via a run buffer. Execution information can be extracted via run buffer execution. Fidelity of execution can be preserved by executing instructions on the target processor. Other features, such as an executable extraction instruction ensemble, branch interpretation, and relative address compensation can be implemented. High quality instruction tracing can thus be achieved without the usual performance penalties.