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    Low power operation of differential image sensor pixels
    1.
    发明授权
    Low power operation of differential image sensor pixels 有权

    公开(公告)号：US11108957B1

    公开(公告)日：2021-08-31

    申请号：US16903939

    申请日：2020-06-17

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Minseok Oh ,  Cyrus Soli Bamji ,  Swati Mehta ,  Barry Thompson ,  Andrew Dean Payne

    IPC: H04N5/232 ,  H04N5/369 ,  H04N5/3745 ,  G01S17/894 ,  H04N5/343

    Abstract: An imaging system includes a sensor array of differential pixels. A controller operates a first differential pixel of the sensor array in a first, lower power mode. The controller supplies a first clock signal to selectively activate a first collection terminal of the first differential pixel for a first duration, and a second clock signal to selectively activate a second collection terminal of the first differential pixel for a second duration. In an analog domain, a first amount of charge accumulated at the first collection terminal over the first duration is readout and compared to a readout of a second amount of charge accumulated at the second collection terminal over the second duration. Responsive to the first amount of charge being different from the second amount of charge by more than a threshold, the first differential pixel of the sensor array is operated in a second, higher power mode.

    Readout voltage uncertainty compensation in time-of-flight imaging pixels
    2.
    发明授权
    Readout voltage uncertainty compensation in time-of-flight imaging pixels 有权

    公开(公告)号：US10742912B2

    公开(公告)日：2020-08-11

    申请号：US16503896

    申请日：2019-07-05

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Cyrus Soli Bamji ,  Onur Can Akkaya ,  Tamer Elkhatib ,  Swati Mehta ,  Satyadev H. Nagaraja ,  Vijay Rajasekaran

    IPC: H04N5/363 ,  H01L27/146 ,  G01S7/481 ,  G01S17/89

    Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

    Readout voltage uncertainty compensation in time-of-flight imaging pixels
    3.
    发明授权
    Readout voltage uncertainty compensation in time-of-flight imaging pixels 有权

    公开(公告)号：US10389957B2

    公开(公告)日：2019-08-20

    申请号：US15385198

    申请日：2016-12-20

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Cyrus Soli Bamji ,  Onur Can Akkaya ,  Tamer Elkhatib ,  Swati Mehta ,  Satyadev H. Nagaraja ,  Vijay Rajasekaran

    IPC: H04N5/363 ,  G01S17/89 ,  G01S7/481 ,  H01L27/146

    Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

    CMOS DEPTH IMAGE SENSOR WITH INTEGRATED SHALLOW TRENCH ISOLATION STRUCTURES
    7.
    发明申请
    CMOS DEPTH IMAGE SENSOR WITH INTEGRATED SHALLOW TRENCH ISOLATION STRUCTURES 审中-公开
    CMOS深度图像传感器，具有集成的SHALLOW TRENCH隔离结构

    公开(公告)号：US20160225812A1

    公开(公告)日：2016-08-04

    申请号：US14788235

    申请日：2015-06-30

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Tamer Elkhatib ,  Onur Can Akkaya ,  Swati Mehta ,  Cyrus Bamji

    IPC: H01L27/146

    CPC classification number: H01L31/02327 ,  G01S7/481 ,  G01S17/32 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14689 ,  H01L31/028

    Abstract: A CMOS image sensor pixel has an integrated shallow trench isolation structure, resulting in higher optical sensitivity in general, and specifically for long wavelengths (red, near infrared, infrared). The shallow trench isolation structure acts as an optical grating that reflects and diffracts light so that an increased optical energy (photo generation) is observed in the photosensitive semiconductor layer of the pixel. An increase in dark current is avoided by passivating the shallow trench isolation structure with dopant which was implanted within the photosensitive semiconductor layer. Annealing in a standard CMOS process causes the dopant to diffuse toward the shallow trench isolation structure. The pixel can be configured as a time-of-flight sensor. The shallow trench isolation structure acts as a physical barrier for electrical charge motion, resulting in a higher modulation contrast pixel. Further, front side or backside illumination can be used.

    Abstract translation: CMOS图像传感器像素具有集成的浅沟槽隔离结构，通常导致更高的光学灵敏度，并且特别针对长波长（红色，近红外线，红外线）。 浅沟槽隔离结构用作反射和衍射光的光栅，使得在像素的光敏半导体层中观察到增加的光能（光生成）。 通过将注入在光敏半导体层内的掺杂剂钝化浅沟槽隔离结构来避免暗电流的增加。 在标准CMOS工艺中退火使掺杂剂向浅沟槽隔离结构扩散。 像素可以配置为飞行时间传感器。 浅沟槽隔离结构充当电荷运动的物理屏障，导致更高的调制对比像素。 此外，可以使用前侧或背面照明。

    Burst-mode time-of-flight imaging
    8.
    发明授权
    Burst-mode time-of-flight imaging 有权
    突发模式飞行时间成像

    公开(公告)号：US09497440B2

    公开(公告)日：2016-11-15

    申请号：US13857946

    申请日：2013-04-05

    Applicant: MICROSOFT TECHNOLOGY LICENSING, LLC

    Inventor： Cyrus Bamji ,  Tamer Elkhatib ,  Swati Mehta ,  Zhanping Xu

    IPC: H04N13/02 ,  G01S17/36 ,  G01S17/89 ,  G01S7/486 ,  H01L27/146

    CPC classification number: H04N13/204 ,  G01S7/4863 ,  G01S7/4865 ,  G01S17/36 ,  G01S17/89 ,  H01L27/14609

    Abstract: An imager includes an emitter, an array of pixel elements, and driver logic. The emitter releases bursts of light pulses with pauses between bursts. Each element of the array has a finger gate biasable to attract charge to the surface, a reading node to collect the charge, and a transfer gate to admit such charge to the reading node and to deter such charge from being absorbed into the finger gate. The driver logic biases the finger gates with the modulated light pulses such that the finger gates of adjacent first and second elements cycle with unequal phase into and out of a charge-attracting state. To reduce the effects of ambient light on the imager, the driver logic is configured to bias the transfer gates so that the charge is admitted to the reading node only during the bursts and is prevented from reaching the reading node during the pauses.

    Abstract translation: 成像器包括发射器，像素元件阵列和驱动器逻辑。 发射器在脉冲串之间暂停时发射脉冲串。 该阵列的每个元件具有可偏置以将电荷吸引到表面的指状栅极，用于收集电荷的读取节点以及用于将该电荷允许到读取节点的传输门，并阻止该电荷被吸收到手指栅极中。 驱动器逻辑利用调制的光脉冲偏置手指门，使得相邻的第一和第二元件的指状栅极以不相等的相位进入和移出电荷吸引状态。 为了减少环境光对成像器的影响，驱动器逻辑被配置为偏置传输门，使得仅在突发期间才允许电荷进入读取节点，并且在暂停期间被阻止到达读取节点。

    READOUT VOLTAGE UNCERTAINTY COMPENSATION IN TIME-OF-FLIGHT IMAGING PIXELS
    9.
    发明申请
    READOUT VOLTAGE UNCERTAINTY COMPENSATION IN TIME-OF-FLIGHT IMAGING PIXELS 审中-公开

    公开(公告)号：US20190335124A1

    公开(公告)日：2019-10-31

    申请号：US16503896

    申请日：2019-07-05

    Applicant: Microsoft Technology Licensing, LLC

    Inventor： Cyrus Soli Bamji ,  Onur Can Akkaya ,  Tamer Elkhatib ,  Swati Mehta ,  Satyadev H. Nagaraja ,  Vijay Rajasekaran

    IPC: H04N5/363 ,  G01S7/481 ,  G01S17/89

    Abstract: Pixel arrangements in time-of-flight sensors are presented that include sensing elements that establish charges related to incident light, charge storage elements that accumulate integrated charges transferred from the sensing elements, and diffusion nodes configured to establish measurement voltages representative of the integrated charges that are dumped from the charge storage elements. The pixel arrangement includes analog domain output circuitry comprising a measurement capacitance element that stores the measurement voltage, and a reset capacitance element that stores a reset voltage established at the diffusion node during a reset phase performed prior to a measurement phase. The analog domain output circuitry subtracts the stored reset voltage from the stored measurement voltage for processing into a pixel output voltage that at least partially reduces readout voltage uncertainty of the pixel arrangement.

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