公开(公告)号：US20050269708A1

公开(公告)日：2005-12-08

申请号：US11172992

申请日：2005-07-05

Applicant: Panayotis Andricacos ,  Steven Boettcher ,  Fenton McFeely ,  Milan Paunovic

Inventor： Panayotis Andricacos ,  Steven Boettcher ,  Fenton McFeely ,  Milan Paunovic

IPC: H01L21/288 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76843 ,  H01L21/2885 ,  H01L21/76873 ,  H01L21/76877

Abstract: An interconnection structure is provided wherein comprises a substrate having a dielectric layer with a via opening therein; wherein the opening has a barrier layer; and electrodeposited copper.

Abstract translation: 提供一种互连结构，其中包括具有其中具有通孔开口的电介质层的衬底; 其中所述开口具有阻挡层; 和电沉积铜。

公开(公告)号：US06911229B2

公开(公告)日：2005-06-28

申请号：US10215324

申请日：2002-08-09

Applicant: Panayotis C. Andricacos ,  Steven H. Boettcher ,  Fenton Read McFeely ,  Milan Paunovic

Inventor： Panayotis C. Andricacos ,  Steven H. Boettcher ,  Fenton Read McFeely ,  Milan Paunovic

IPC: H01L21/285 ,  H01L21/288 ,  H01L21/768 ,  H01L23/532 ,  B05D5/12 ,  C23C14/32 ,  H01L21/44

CPC classification number: H01L21/76843 ,  H01L21/28562 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76873 ,  H01L21/76874 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00

Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.

Abstract translation: 一种互连结构，包括其中具有通孔开口的介电层的基板; 位于通孔开口中的阻挡层; 阻挡层上的钯和/或铂的中间层; 并且在中间层上设置一层铜或铜合金。

公开(公告)号：US4908242A

公开(公告)日：1990-03-13

申请号：US187821

申请日：1988-04-29

Applicant: Rowan Hughes ,  Milan Paunovic ,  Rudolph J. Zeblisky

Inventor： Rowan Hughes ,  Milan Paunovic ,  Rudolph J. Zeblisky

IPC: C23C18/16 ,  C23C18/40 ,  H05K3/18

CPC classification number: C23C18/1617 ,  C23C18/1675 ,  C23C18/1683 ,  C23C18/405 ,  H05K3/187

Abstract: Electroless metal plating solutions are formulated and controlled to provide high quality metal deposits by establishing the intrinsic cathodic reaction rate of the solution less than 110% of the intrinsic anodic reaction rate. Methods are provided to formulate electroless copper plating solutions which can deposit copper on printed wiring boards of quality sufficient to pass a thermal stress of 10 seconds contact with molten solder at 288.degree. C. without cracking the copper deposits on the surface of the printed wiring boards or in the holes. The ratio of the anodic reaction rate to the cathodic reaction rate can be determined by electrochemical measurements, or it can be estimated by varying the concentration of the reactants and measuring the plating rates.

Abstract translation: 配制和控制化学镀金属溶液以通过确定溶液的本征阴极反应速率小于内在阳极反应速率的110％来提供高质量的金属沉积物。 提供了方法来制备化学镀铜溶液，其可以将印刷电路板上的铜沉积到质量足以使与熔融焊料在288℃下接触10秒的热应力，而不会破坏印刷线路板表面上的铜沉积物 或在洞里。 阳极反应速率与阴极反应速率的比例可以通过电化学测量来确定，或者可以通过改变反应物的浓度和测量电镀速率来估算。

公开(公告)号：US06395164B1

公开(公告)日：2002-05-28

申请号：US09414224

申请日：1999-10-07

Applicant: Panayotis Andricacos ,  James E. Fluegel ,  John G. Gaudiello ,  Ronald D. Goldblatt ,  Sandra G. Malhotra ,  Milan Paunovic

Inventor： Panayotis Andricacos ,  James E. Fluegel ,  John G. Gaudiello ,  Ronald D. Goldblatt ,  Sandra G. Malhotra ,  Milan Paunovic

IPC: C25D712

CPC classification number: H01L21/76868 ,  C23C18/161 ,  C23C18/1653 ,  C25D7/123 ,  H01L21/288 ,  H01L21/76843 ,  H01L21/76873

Abstract: An electroless touch-up process for repairing copper metallization deposited in dual damascene structures with high aspect ratios. An initial copper strike layer is produced by directional deposition techniques such that discontinuous sidewall coverage occurs. An evolutionary electroless touch-up process then proceeds to conformally grow the copper layer on all surfaces. The result of the evolutionary process is to produce a continuous copper strike layer that can be used with conventional electroplating techniques.

Abstract translation: 用于修复沉积在具有高纵横比的双镶嵌结构中的铜金属化的无电镀修补方法。 通过定向沉积技术产生初始铜击穿层，从而发生不连续的侧壁覆盖。 然后进行进化的无电触摸处理以在所有表​​面上保形地生长铜层。 进化过程的结果是产生可与常规电镀技术一起使用的连续铜击穿层。

公开(公告)号：US5169680A

公开(公告)日：1992-12-08

申请号：US850251

申请日：1992-03-11

Applicant: Chiu H. Ting ,  Milan Paunovic

Inventor： Chiu H. Ting ,  Milan Paunovic

IPC: H01L21/288 ,  H01L21/768

CPC classification number: H01L21/76877 ,  H01L21/288 ,  H01L21/76879

Abstract: Electroless deposition of a conducting material on an underlying conductive region is used in a fabrication of a semiconductor device. Electroless deposition provides a selective and an additive process for forming conductive layers, filling window and providing interconnections and terminals. The conducting material is selectively deposited on a catalytic underlying surface. When the underlying surface is not catalytic, an activation step is used to cause the surface to be catalytic. Where the base underlying surface is a substrate, a contact region is formed on the substrate for electroless deposition of the conducting material.

Abstract translation: 在半导体器件的制造中使用导电材料在下面的导电区域上的无电沉积。 无电沉积提供了形成导电层，填充窗口并提供互连和端子的选择性和添加过程。 导电材料选择性地沉积在催化下面的表面上。 当底层表面不催化时，使用活化步骤使表面催化。 在基底下表面是基底的情况下，在基底上形成接触区域以进行导电材料的无电沉积。

公开(公告)号：US4814197A

公开(公告)日：1989-03-21

申请号：US926362

申请日：1986-10-31

Applicant: John Duffy ,  Milan Paunovic ,  Stephen M. Christian ,  John F. McCormack

Inventor： John Duffy ,  Milan Paunovic ,  Stephen M. Christian ,  John F. McCormack

IPC: C23C18/34 ,  C23C18/16 ,  C23C18/36 ,  C23C18/40 ,  C23C18/50 ,  G01N27/48 ,  B05D1/18

CPC classification number: C23C18/1675 ,  C23C18/1683

Abstract: Methods of analyzing and controlling an electroless plating solution are described which provide for real time control of the electroless plating solution, e.g., an electroless copper bath whose main constituents are copper sulfate, complexing agent, formaldehyde, a hydroxide and a stabilizer. All necessary constituent concentrations, particularly the reducing agent concentration, are measured in situ and may be used to analyze and/or control the composition of the bath. A control cycle of less than one minute is required and hence real time control is achieved. The in situ measurements also provide quality indicia of the copper quality factors which are likewise used to control composition of the bath. Data from the in situ measurements is fed to a computer which, in turn, controls additions to the bath to maintain a bath composition which provides good quality electrolessly formed, copper plating.

Abstract translation: 描述了分析和控制化学镀溶液的方法，其提供化学镀溶液的实时控制，例如其主要成分是硫酸铜，络合剂，甲醛，氢氧化物和稳定剂的化学镀铜浴。 所有必需的成分浓度，特别是还原剂浓度，都是原位测量的，可用于分析和/或控制浴的组成。 需要小于1分钟的控制周期，因此实现了实时控制。 原位测量还提供同样用于控制浴的组成的铜质量因子的质量标记。 来自原位测量的数据被馈送到计算机，计算机进而控制对浴的添加以保持提供优质无电镀铜镀液的浴组合物。

公开(公告)号：US20080237053A1

公开(公告)日：2008-10-02

申请号：US12127477

申请日：2008-05-27

Applicant: Panayotis Andricacos ,  Steven H. Boettcher ,  Sandra G. Malhotra ,  Milan Paunovic ,  Craig Ransom

Inventor： Panayotis Andricacos ,  Steven H. Boettcher ,  Sandra G. Malhotra ,  Milan Paunovic ,  Craig Ransom

IPC: C25D5/34

CPC classification number: C25D3/562 ,  C25D7/12 ,  H01L21/2885 ,  H01L21/76846

Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; wherein the opening has an underlayer of cobalt and/or nickel therein, barrier layer of an alloy of cobalt and/or nickel; and tungsten is provided.

Abstract translation: 一种互连结构，包括其中具有通孔开口的介电层的基板; 其中所述开口具有其中的钴和/或镍的底层，钴和/或镍的合金的阻挡层; 并提供钨。

公开(公告)号：US5729201A

公开(公告)日：1998-03-17

申请号：US496838

申请日：1995-06-29

Applicant: Christopher Jahnes ,  Richard Joseph Gambino ,  Milan Paunovic ,  Alejandro Gabriel Schrott ,  Robert Jacob von Gutfeld

Inventor： Christopher Jahnes ,  Richard Joseph Gambino ,  Milan Paunovic ,  Alejandro Gabriel Schrott ,  Robert Jacob von Gutfeld

IPC: G06K19/06 ,  G06K19/067 ,  G08B13/24 ,  G08B13/14

CPC classification number: G08B13/2408 ,  G06K19/06187 ,  G06K19/067 ,  G08B13/2417 ,  G08B13/2437 ,  G08B13/2442

Abstract: An inexpensive multibit magnetic tag is described which uses an array of amorphous wires in conjunction with a magnetic bias field. The tag is interrogated by the use of a ramped field or an ac field or a combination of the two. The magnetic bias is supplied either by coating each wire with a hard magnetic material which is magnetized or by using magnetized hard magnetic wires or foil strips in proximity to the amorphous wires. Each wire switches at a different value of the external interrogation field due to the difference in the magnetic bias field acting on each wire.

Abstract translation: 描述了一种廉价的多位磁性标签，其使用结合磁偏置场的非晶线阵列。 通过使用斜坡场或交流场或两者的组合来询问标签。 通过用磁化的硬磁性材料或通过使用靠近非晶线的磁化的硬磁线或箔条来涂覆每根导线来提供磁偏置。 由于作用在每根导线上的磁偏置磁场的差异，每根电线以外部询问磁场的不同值进行切换。

公开(公告)号：US5380560A

公开(公告)日：1995-01-10

申请号：US921186

申请日：1992-07-28

Applicant: Suryanarayana Kaja ,  Shyama P. Mukherjee ,  Eugene J. O'Sullivan ,  Milan Paunovic

Inventor： Suryanarayana Kaja ,  Shyama P. Mukherjee ,  Eugene J. O'Sullivan ,  Milan Paunovic

IPC: C23C18/16 ,  C23C18/30 ,  H05K3/24 ,  C23C26/00

CPC classification number: H05K3/465 ,  C23C18/1607 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/1635 ,  C23C18/1637 ,  C23C18/30 ,  C23C18/32 ,  H05K3/244 ,  H05K2201/0154 ,  H05K2201/0761 ,  H05K2203/0716 ,  H05K2203/072 ,  H05K2203/0766 ,  H05K3/384 ,  H05K3/388

Abstract: A method of selectively seeding or activating metal interconnections patterned on polyimide dielectric surfaces using an aqueous solution of palladium sulfate, palladium perchlorate, palladium trifluoromethane sulfonate, palladium nitrate or other palladium salts having poorly coordinating counter ions. This strongly selective seeding and the corresponding ability to reliably remove all traces of the seeding material from the polyimide surface eliminates shorting, bridging and reduction of breakdown voltage during electroless plating of a thin layer of nickel or cobalt.

Abstract translation: 使用硫酸钯，高氯酸钯，三氟甲烷磺酸钯，硝酸钯或具有配位不良的抗衡离子的其它钯盐的水溶液选择性地接种或活化在聚酰亚胺电介质表面上形成的金属互连的方法。 这种强选择性接种和相应的能够从聚酰亚胺表面可靠地除去接种材料的痕迹消除了在镍或钴的薄层的化学镀期间短路，桥接和降低击穿电压。

公开(公告)号：US4303798A

公开(公告)日：1981-12-01

申请号：US34210

申请日：1979-04-27

Applicant: Milan Paunovic

Inventor： Milan Paunovic

IPC: H05K3/06 ,  H05K3/24 ,  H05K3/42 ,  H05K1/09

CPC classification number: H05K3/24 ,  H05K3/244 ,  H05K3/42 ,  H05K2201/0341 ,  H05K3/062 ,  H05K3/426 ,  H05K3/427 ,  H05K3/428 ,  Y10S428/901

Abstract: The heat shock resistance of plated through holes in printed circuit assemblies is significantly increased by using as the through hole plating a special multi-layered arrangement comprising at least two layers of an electrically conductive metal in combination with at least one intermediate layer of a different electrically conductive metal. In preferred embodiments, the through hole plating comprises at least two layers of a stressed metal together with at least one intermediate layer of a metal having a stress in counteraction to that of one or more of the other metal layers. These through hole platings are capable of exposure to conditions of heat shock, such as encountered during high temperature soldering, without developing cracks resulting in breaks in the conducting pathways and failures.

Abstract translation: 通过使用特殊的多层布置，包括至少两层导电金属与至少一个不同电学中间层的组合，使用印刷电路组件中电镀通孔的耐热冲击性 导电金属。 在优选实施例中，通孔镀层包括至少两层应力金属以及至少一个金属中间层，其具有与一个或多个其它金属层的应力相反的应力。 这些通孔电镀能够暴露于热冲击的条件下，例如在高温焊接期间遇到的，而不会产生导致导电路径和故障中断的裂纹。