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公开(公告)号：US20160103664A1
公开(公告)日：2016-04-14
申请号：US14510441
申请日：2014-10-09
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Hojin Kee , Haoran Yi , Tai A. Ly , Newton G. Petersen , James M. Lewis , Dustyn K. Blasig , Adam T. Arnesen , Taylor L. Riche
Abstract: System and method for performing correlation analysis. A program that includes multiple program structures and one or more data objects is stored. Each data object is shared by at least two of the program structures. For each program structure, decomposition effects on each of the data objects shared by the program structure resulting from each of a respective one or more optimizing transforms applied to the program structure are analyzed. One or more groups of correlated structures are determined based on the analyzing. Each group includes two or more program structures that share at least one data object, and at least one optimizing transform that is compatible with respect to the two or more program structures and the shared data object. For at least one group, the at least one optimizing transform is usable to transform the two or more program structures to meet a specified optimization objective.
Abstract translation: 执行相关分析的系统和方法。 存储包括多个程序结构和一个或多个数据对象的程序。 每个数据对象由至少两个程序结构共享。 对于每个程序结构，分析由应用于程序结构的相应的一个或多个优化变换中的每一个产生的由程序结构共享的每个数据对象的分解效果。 基于分析确定一组或多组相关结构。 每个组包括共享至少一个数据对象的两个或更多个程序结构，以及与两个或多个程序结构和共享数据对象兼容的至少一个优化变换。 对于至少一个组，所述至少一个优化变换可用于变换所述两个或多个程序结构以满足指定的优化目标。
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公开(公告)号：US09898267B2
公开(公告)日：2018-02-20
申请号：US15277660
申请日：2016-09-27
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Hojin Kee , Haoran Yi , Tai A. Ly , Newton G. Petersen , James M. Lewis , Dustyn K. Blasig , Adam T. Arnesen , Taylor L. Riche
Abstract: System and method for performing correlation analysis. A program that includes multiple program structures and one or more data objects is stored. Each data object is shared by at least two of the program structures. For each program structure, decomposition effects on each of the data objects shared by the program structure resulting from each of a respective one or more optimizing transforms applied to the program structure are analyzed. One or more groups of correlated structures are determined based on the analyzing. Each group includes two or more program structures that share at least one data object, and at least one optimizing transform that is compatible with respect to the two or more program structures and the shared data object. For at least one group, the at least one optimizing transform is usable to transform the two or more program structures to meet a specified optimization objective.
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3.发明授权公开(公告)号：US09135143B2
公开(公告)日：2015-09-15
申请号：US13646905
申请日：2012-10-08
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Jeffrey N. Correll , Dustyn K. Blasig , Newton G. Petersen
CPC classification number: G06F11/362 , G06F8/30 , G06F8/34 , G06F8/41
Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.
Abstract translation: 当将高级图形代码（例如LabVIEW™代码）编译成不同的表示（例如不同的软件代码或硬件FPGA）时，可能会从编译过程中收集/捕获与设计特征有关的信息，并自动提供给所有 编译过程的早期阶段获得更优化的结果。 没有对这些信息的自动反馈，用户必须手动识别，生成和提供反馈信息，或放弃过程，必须假设该工具已经产生了尽可能最好的结果。 为了纠正时序，可能会解析失败的约束路径，并将其与先前编译期间获得的延迟进行比较，而不能产生预期结果的先前调整可能会被撤销。 然后可以识别和调整不是由未消除路径引起的最长延迟，并且可以重复该过程，直到预测所有路径通过。
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公开(公告)号：US20150242193A1
公开(公告)日：2015-08-27
申请号：US14704689
申请日：2015-05-05
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Hojin Kee , Tai A. Ly , Newton G. Petersen , Jeffrey D. Washington , Haoran Yi , Dustyn K. Blasig
CPC classification number: G06F8/41 , G06F8/34 , G06F8/443 , G06F8/4435 , G06F8/447 , G06F8/48 , G06F8/49 , G06F11/3636
Abstract: When compiling high level, graphical code (e.g. LabVIEW™ code) representative of a design, parts of the code that do not depend on external input data may be executed during the compilation process. Specific variables and/or value traces of specific variables in the program, e.g. constant values and/or repeating patterns may be recorded then analyzed, and certain transformations may be applied in the compilation process according to the results of the analysis, thereby optimizing the design. In one approach, the graph may be dynamically stepped through one node at a time, and it may be determined whether all inputs to the stepped-through node are known. If those inputs are known, type conversion and the operation corresponding to the stepped-through node may be dynamically performed. In another approach, a subset of the graphical code not depending on external data may be compiled and executed, thereby obtaining the same results as described above.
Abstract translation: 在编译表示设计的高级图形代码（例如LabVIEW™代码）时，可能在编译过程中执行不依赖于外部输入数据的代码部分。 程序中特定变量的具体变量和/或值跟踪。 可以记录常数值和/或重复图案，然后分析，并且可以根据分析结果在编译过程中应用某些变换，从而优化设计。 在一种方法中，图可以一次动态地跨越一个节点，并且可以确定是否知道到逐步节点的所有输入。 如果这些输入是已知的，则类型转换并且可以动态地执行与逐步节点相对应的操作。 在另一方法中，可以编译并执行不依赖于外部数据的图形代码的子集，从而获得与上述相同的结果。
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公开(公告)号：US20140358469A1
公开(公告)日：2014-12-04
申请号：US14295443
申请日：2014-06-04
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Christopher F. Graf , Ryan P. Verret , Joseph H. DiGiovanni , David E. Klipec , Dustyn K. Blasig , Jeronimo Mota , Kunal H. Patel , Duncan G. Hudson, III , Brian K. Odom
IPC: G01D11/00
CPC classification number: G01D11/00 , G06F9/4411 , G06F11/273 , G06F17/5054
Abstract: System and method for extending programmable device functionality while preserving functionality of the device driver and driver IP. User input may be received specifying functionality of custom IP for a programmable measurement device with standard driver IP. The custom IP may be generated accordingly, and may be deployable to the programmable measurement device. During operation the custom IP may communicate directly with the standard driver IP and may provide custom functionality of the programmable measurement device while preserving functionality of the standard driver IP on the programmable measurement device and the standard device driver.
Abstract translation: 用于扩展可编程设备功能的系统和方法，同时保留设备驱动程序和驱动程序IP的功能。 可以接收用户输入，指定具有标准驱动程序IP的可编程测量设备的自定义IP的功能。 可以相应地生成定制IP，并且可以部署到可编程测量设备。 在操作期间，定制IP可以直接与标准驱动器IP通信，并且可以提供可编程测量设备的定制功能，同时在可编程测量设备和标准设备驱动器上保持标准驱动器IP的功能。
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Patent Agency Ranking
公开(公告)号：US09870206B2
公开(公告)日：2018-01-16
申请号：US14937732
申请日：2015-11-10
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Julian G. Valdez , Taylor L. Riche , Neil S. Feiereisel , Robert E. Dye , Stephen R. Loftus-Mercer , Dustyn K. Blasig , Mary E. Fletcher , Brent C. Schwan , Stephen L. Dark
Abstract: System and method for creating a graphical program. A first replication structure may be included in a graphical program, where the first replication structure specifies replication of any graphical program code inside the first replication structure. First graphical program code may be included inside the first replication structure. An implementation of the graphical program may be automatically generated, including generating multiple instances of an implementation of the first graphical program code within the implementation of the graphical program. Executing the graphical program may include executing the multiple instances, e.g., concurrently and/or serially.
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公开(公告)号：US09558099B2
公开(公告)日：2017-01-31
申请号：US14807610
申请日：2015-07-23
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Jeffrey N. Correll , Dustyn K. Blasig , Newton G. Petersen
CPC classification number: G06F11/362 , G06F8/30 , G06F8/34 , G06F8/41
Abstract: When compiling high-level, graphical code (e.g. LabVIEW™ code) to a different representation (e.g. different software code or hardware FPGA), information relating to characteristics of the design may be collected/captured from the compilation process, and automatically provided to all the earlier stages of the compilation process to obtain more optimal results. Without automated feedback of this information, users have to manually identify, produce, and provide the feedback information, or forego the process altogether, having to assume that the tool has produced the best possible results when that may not be the case. To correct timing, failed constraints paths may be parsed and compared to delays obtained during a previous compile, and previous adjustments that didn't yield desired results may be undone. The longest delay that didn't result from an undone path may then be identified, and adjusted, and the process may be repeated until all paths are predicted to pass.
Abstract translation: 当将高级图形代码（例如LabVIEW™代码）编译成不同的表示（例如不同的软件代码或硬件FPGA）时，可能会从编译过程中收集/捕获与设计特征有关的信息，并自动提供给所有 编译过程的早期阶段获得更优化的结果。 没有对这些信息的自动反馈，用户必须手动识别，生成和提供反馈信息，或放弃过程，必须假设该工具已经产生了尽可能最好的结果。 为了纠正时序，可能会解析失败的约束路径，并将其与先前编译期间获得的延迟进行比较，而不能产生预期结果的先前调整可能会被撤销。 然后可以识别和调整不是由未消除路径引起的最长延迟，并且可以重复该过程，直到预测所有路径通过。
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8.发明授权公开(公告)号：US09411920B2
公开(公告)日：2016-08-09
申请号：US14107476
申请日：2013-12-16
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Dustyn K. Blasig , Newton G. Petersen , Matthew E. Novacek , Julian G. Valdez
IPC: G06F17/50
CPC classification number: G06F17/5059 , G06F8/34 , G06F17/5031 , G06F2217/62 , G06F2217/84
Abstract: System and method for specifying and implementing relative hardware clocking in a high level programming language. User input specifying a program may be received. The program is specified for deployment to a programmable hardware element (PHE), and includes first and second code portions configured to communicate with each other during execution. The user input may further specify a rational ratio of respective execution rates for the first and second code portions. A hardware configuration program (HCP) implementing the specified program is automatically generated, including automatically determining a respective clock rate for at least one of the first and second code portions based on the rational ratio. The HCP may be deployable to the PHE, including implementing first and second clocks for controlling execution of the first and second code portions in accordance with the rational ratio and the automatically determined respective clock rate for the at least one code portion.
Abstract translation: 用于以高级编程语言指定和实现相对硬件时钟的系统和方法。 可以接收指定程序的用户输入。 该程序被指定用于部署到可编程硬件元件（PHE），并且包括配置为在执行期间彼此通信的第一和第二代码部分。 用户输入还可以指定第一和第二代码部分的相应执行率的有理比率。 自动产生实现指定程序的硬件配置程序（HCP），包括基于有理比率自动确定第一和第二代码部分中的至少一个的相应时钟速率。 HCP可以部署到PHE，包括根据有理比率实现第一和第二时钟，用于控制第一和第二代码部分的执行，以及自动确定的至少一个代码部分的相应时钟速率。
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公开(公告)号：US09189215B1
公开(公告)日：2015-11-17
申请号：US14468935
申请日：2014-08-26
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Taylor L. Riche , Newton G. Petersen , Hojin Kee , Adam T. Arnesen , Haoran Yi , Dustyn K. Blasig , Tai A. Ly
IPC: G06F9/45
Abstract: System and method for convergence analysis. One or more state variables of a first program may be determined based on dependencies of variables in a first program. A second program corresponding to the first program is created based on the state variables and their dependencies, and executed multiple times. Each execution may include recording values of the state variables, determining an execution count, comparing the values to corresponding values from previous executions of the second program, and terminating the executing in response to the values matching corresponding values from at least one previous execution of the second program. A convergence property for the first program is determined based on the execution count, and indicating a number of executions of the first program required to generate all possible values of the one or more variables. The convergence property is stored, and may be useable to optimize the first program.
Abstract translation: 收敛分析的系统和方法 可以基于第一程序中的变量的依赖性来确定第一程序的一个或多个状态变量。 基于状态变量及其依赖性创建与第一程序相对应的第二程序，并执行多次。 每个执行可以包括状态变量的记录值，确定执行计数，将值与先前执行的第二程序的对应值进行比较，并且响应于与来自所述第二程序的至少一个先前执行的对应值匹配的值终止执行 第二个程序。 基于执行次数确定第一程序的收敛性，并且指示生成所述一个或多个变量的所有可能值所需的第一程序的执行次数。 收敛性被存储，并可用于优化第一程序。
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10.发明申请公开(公告)号：US20140344614A1
公开(公告)日：2014-11-20
申请号：US14107476
申请日：2013-12-16
Applicant: NATIONAL INSTRUMENTS CORPORATION
Inventor： Dustyn K. Blasig , Newton G. Petersen , Matthew E. Novacek , Julian G. Valdez
IPC: G06F1/06
CPC classification number: G06F17/5059 , G06F8/34 , G06F17/5031 , G06F2217/62 , G06F2217/84
Abstract: System and method for specifying and implementing relative hardware clocking in a high level programming language. User input specifying a program may be received. The program is specified for deployment to a programmable hardware element (PHE), and includes first and second code portions configured to communicate with each other during execution. The user input may further specify a rational ratio of respective execution rates for the first and second code portions. A hardware configuration program (HCP) implementing the specified program is automatically generated, including automatically determining a respective clock rate for at least one of the first and second code portions based on the rational ratio. The HCP may be deployable to the PHE, including implementing first and second clocks for controlling execution of the first and second code portions in accordance with the rational ratio and the automatically determined respective clock rate for the at least one code portion.
Abstract translation: 用于以高级编程语言指定和实现相对硬件时钟的系统和方法。 可以接收指定程序的用户输入。 该程序被指定用于部署到可编程硬件元件（PHE），并且包括配置为在执行期间彼此通信的第一和第二代码部分。 用户输入还可以指定第一和第二代码部分的相应执行率的有理比率。 自动产生实现指定程序的硬件配置程序（HCP），包括基于有理比率自动确定第一和第二代码部分中的至少一个的相应时钟速率。 HCP可以部署到PHE，包括根据有理比率实现第一和第二时钟，用于控制第一和第二代码部分的执行，以及自动确定的至少一个代码部分的相应时钟速率。
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