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公开(公告)号:US10200823B2
公开(公告)日:2019-02-05
申请号:US14964083
申请日:2015-12-09
Applicant: Navico Holding AS
Inventor: Matthew Laster , Christopher Richardson
Abstract: Various implementations described herein are directed to technologies for capturing marine electronics data. An apparatus includes a processor and a memory having a plurality of executable instructions that are executed by the processor. The processor receives a first request to capture data. The processor generates a command in response to the first request. The processor sends the command across a network to one or more devices capable of responding to the command. The command may include at least timestamp data and a second request for each of the one or more devices to collect data that each of the one or more devices is configured to collect.
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公开(公告)号:US10609149B2
公开(公告)日:2020-03-31
申请号:US16241238
申请日:2019-01-07
Applicant: NAVICO HOLDING AS
Inventor: Matthew Laster , Christopher Richardson
IPC: G06F15/16 , H04L29/08 , B63B49/00 , G01C21/20 , G06F3/0484 , H04W4/02 , H04W4/029 , H04W4/40 , B63B79/00
Abstract: Various implementations described herein are directed to technologies for capturing marine electronics data. An apparatus includes a processor and a memory having a plurality of executable instructions that are executed by the processor. The processor receives a first request to capture data. The processor generates a command in response to the first request. The processor sends the command across a network to one or more devices capable of responding to the command. The command may include at least timestamp data and a second request for each of the one or more devices to collect data that each of the one or more devices is configured to collect.
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公开(公告)号:US20190141496A1
公开(公告)日:2019-05-09
申请号:US16241238
申请日:2019-01-07
Applicant: NAVICO HOLDING AS
Inventor: Matthew Laster , Christopher Richardson
Abstract: Various implementations described herein are directed to technologies for capturing marine electronics data. An apparatus includes a processor and a memory having a plurality of executable instructions that are executed by the processor. The processor receives a first request to capture data. The processor generates a command in response to the first request. The processor sends the command across a network to one or more devices capable of responding to the command. The command may include at least timestamp data and a second request for each of the one or more devices to collect data that each of the one or more devices is configured to collect.
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公开(公告)号:US20170171316A1
公开(公告)日:2017-06-15
申请号:US14964083
申请日:2015-12-09
Applicant: Navico Holding AS
Inventor: Matthew Laster , Christopher Richardson
IPC: H04L29/08 , G06F3/0484 , G06F3/0482
CPC classification number: H04W4/046 , B63B49/00 , B63J2099/008 , G01C21/203 , G06F3/0484 , H04W4/027 , H04W4/029
Abstract: Various implementations described herein are directed to technologies for capturing marine electronics data. An apparatus includes a processor and a memory having a plurality of executable instructions that are executed by the processor. The processor receives a first request to capture data. The processor generates a command in response to the first request. The processor sends the command across a network to one or more devices capable of responding to the command. The command may include at least timestamp data and a second request for each of the one or more devices to collect data that each of the one or more devices is configured to collect.
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