公开(公告)号：US5776512A

公开(公告)日：1998-07-07

申请号：US733147

申请日：1996-10-16

Applicant: Patrick O. Weber

Inventor： Patrick O. Weber

IPC: B29C45/14 ,  H01L21/56 ,  B29C45/02

CPC classification number: H01L21/565 ,  B29C45/14655 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2924/01079 ,  Y10S425/228

Abstract: A printed wiring board with either a pin grid array, a ball grid array, a land grid array, etc. of electrical contacts is prepared with a heat sink attached in the usual manner. A passage is provided either in the printed wiring board or in the heat sink so that during the transfer molding process, fluid molding compound passes latitudinally under the heat sink into a cavity below the heat sink. The mold is provided with a biased plug that exerts pressure on the heat sink or printed wiring board to prevent molding compound from covering the heat sink. The biased plug also accommodates variations in the thickness of the printed wiring board.

Abstract translation: 具有以通常的方式附接的散热片制备具有电触点的引脚格栅阵列，球栅阵列，平台栅格阵列等的印刷线路板。 在印刷线路板或散热器中提供通道，使得在传递模塑过程中，流体模塑料在散热器的下方经过纬向放置在散热器下面的空腔中。 该模具设置有偏置的塞子，其对散热器或印刷线路板施加压力，以防止模制化合物覆盖散热器。 偏置的插头也适应印刷电路板厚度的变化。

公开(公告)号：US5689137A

公开(公告)日：1997-11-18

申请号：US543762

申请日：1995-10-16

Applicant: Patrick O. Weber

Inventor： Patrick O. Weber

IPC: B29C45/14 ,  H05K5/02 ,  H05K13/00 ,  H01L23/02 ,  H01L23/495

CPC classification number: H05K5/0269 ,  B29C45/14655 ,  B29C45/14418

Abstract: A method for transfer molding a standard electronic package and an apparatus resulting from such method. A seal is formed between a portion of the mold platens of the mold and a portion of a printed circuit board adjacent to electrical contacts along at least one side of the printed circuit board. After the apparatus is removed from the mold, a protective cap is placed over the electrical contacts.

Abstract translation: 用于传递成型标准电子包装的方法和由这种方法产生的装置。 沿着印刷电路板的至少一侧，在模具的模具的一部分和印刷电路板的与电触头相邻的部分之间形成密封。 将设备从模具中取出后，将保护盖放置在电气触点上。

公开(公告)号：US5597643A

公开(公告)日：1997-01-28

申请号：US402957

申请日：1995-03-13

Applicant: Patrick O. Weber

Inventor： Patrick O. Weber

IPC: H01L21/48 ,  H01L23/13 ,  H01L23/373 ,  H01L23/498 ,  B32B9/00

CPC classification number: H05K3/4697 ,  H01L21/4857 ,  H01L23/13 ,  H01L23/3735 ,  H01L23/49822 ,  H01L24/49 ,  H05K1/021 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/85205 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15787 ,  H01L2924/20752 ,  H05K1/183 ,  H05K2201/09845 ,  H05K2203/063 ,  H05K2203/1476 ,  H05K3/0032 ,  H05K3/429 ,  H05K3/46 ,  H05K3/4641

Abstract: A multi-tier laminate substrate with an internal heat spreader and method for making a multi-tier laminate substrate with an internal heat spreader for electronic device packaging are provided wherein a spacing mechanism is used to protect the bond fingers of a trace on a lower tier of the laminated substrate when a milling bit is used to cut an opening above a die cavity in the multi-tier substrate,.

Abstract translation: 提供具有内部散热器的多层层压基板和用于制造具有用于电子器件封装的内部散热器的多层层压基板的方法，其中使用间隔机构来保护下层的迹线的粘结指 当铣削刀头用于切割多层基底中的模腔上方的开口时，该层压基底。

公开(公告)号：US20100014234A1

公开(公告)日：2010-01-21

申请号：US12174518

申请日：2008-07-16

Applicant: Patrick O. Weber

Inventor： Patrick O. Weber

IPC: H05K7/18 ,  B29D11/00 ,  H05K3/20

CPC classification number: B29C45/16 ,  B29C45/0005 ,  B29C45/0025 ,  B29L2031/3475 ,  Y10T29/49128

Abstract: A method of manufacturing a display monitor, the method comprising: molding a pixel array frame having a plurality of pixel cavities and at least one pixel wall positioned adjacent to at least two pixel cavities, at least one of the pixel cavities having a light pit therein; molding a light diffusing material in the pixel cavities, wherein the light diffusing material does not enter the light pit; selecting a substrate having a top surface and a bottom surface, the substrate having a light source, such as a LED, on the top surface; coupling the bottom surface of the substrate to a printed circuit board configured to controllably operate the light source, wherein the light source is received within the light pit; and coupling the molded pixel array frame to the substrate.

Abstract translation: 一种制造显示监视器的方法，所述方法包括：模制具有多个像素腔的像素阵列框架和至少一个与至少两个像素腔相邻定位的像素壁，所述像素腔中的至少一个在其中具有光凹坑 ; 在所述像素空腔中模制光漫射材料，其中所述光漫射材料不进入所述光凹坑; 选择具有顶表面和底表面的衬底，所述衬底在顶表面上具有诸如LED的光源; 将所述基板的底表面耦合到被配置为可控地操作所述光源的印刷电路板，其中所述光源被接收在所述光凹坑内; 并将模制的像素阵列框架耦合到基板。

公开(公告)号：US06495083B2

公开(公告)日：2002-12-17

申请号：US09312705

申请日：1999-05-17

Applicant: Patrick O. Weber

Inventor： Patrick O. Weber

IPC: B29C4502

CPC classification number: H01L23/3114 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3121 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/83136 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10S425/812 ,  Y10T29/49146 ,  H01L2924/00

Abstract: An integrated circuit chip package according to the present invention includes an integrated circuit chip mounted on a substrate by a plurality of solder bumps. A mold compound is used for underfilling air gaps between the chip and the substrate. The integrated circuit chip package is formed by placing the chip and substrate within a mold cavity and pressing a transfer mold compound into the mold cavity. Air spaces between the integrated circuit chip and the substrate are underfilled by the mold compound as it is pressed in between the integrated circuit chip and the substrate. Air is allowed to escape from between the chip and the substrate during the underfilling through a vent which extends through the substrate. The underfilling material may also be used to encapsulate the chip at the same time that underfilling is performed.

Abstract translation: 根据本发明的集成电路芯片封装包括通过多个焊料凸块安装在基板上的集成电路芯片。 模具化合物用于在芯片和基板之间的填充气隙。 集成电路芯片封装通过将芯片和基板放置在模腔内并将转移模具化合物压入模腔中而形成。 在集成电路芯片和基板之间的空气间隙被压入集成电路芯片和基板之间时，由模具化合物填充。 在底部填充期间允许空气通过延伸穿过基底的排气口从芯片和基底之间逸出。 底部填充材料也可以用于在进行底部填充的同时封装芯片。

公开(公告)号：US06324069B1

公开(公告)日：2001-11-27

申请号：US09459602

申请日：1999-12-13

Applicant: Patrick O. Weber

Inventor： Patrick O. Weber

IPC: H01L2331

CPC classification number: H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/83136 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10T29/49146 ,  H01L2924/00

Abstract: An integrated circuit chip package according to the present invention includes an integrated circuit chip that is mounted on a substrate by a reflow process and by a plurality of solder bumps. At least one standoff is located between the circuit chip and the substrate to maintain a distance between the circuit chip and the substrate during the reflow process. A mold compound is used for underfilling air gaps between the chip and the substrate. The integrated circuit chip package is formed by placing the chip and substrate within a mold cavity and pressing a transfer mold compound into the mold cavity. Air spaces between the integrated circuit chip and the substrate are underfilled by the mold compound as it is pressed in between the integrated circuit chip, the standoffs and the substrate. Air is allowed to escape from between the chip and the substrate during the underfilling through a vent which extends through the substrate. The underfilling material may also be used to encapsulate the chip at the same time that underfilling is performed.

Abstract translation: 根据本发明的集成电路芯片封装包括通过回流工艺和多个焊料凸块安装在基板上的集成电路芯片。 至少一个间隔位于电路芯片和基板之间，以在回流工艺期间保持电路芯片和基板之间的距离。 模具化合物用于在芯片和基板之间的填充气隙。 集成电路芯片封装通过将芯片和基板放置在模腔内并将转移模具化合物压入模腔中而形成。 集成电路芯片和基板之间的空气间隙被压在集成电路芯片，支座和基板之间时由模具化合物充满。 在底部填充期间允许空气通过延伸穿过基底的排气口从芯片和基底之间逸出。 底部填充材料也可以用于在进行底部填充的同时封装芯片。

公开(公告)号：US07049166B2

公开(公告)日：2006-05-23

申请号：US09931587

申请日：2001-08-16

Applicant: Matthew M. Salatino ,  Patrick O. Weber

Inventor： Matthew M. Salatino ,  Patrick O. Weber

IPC: H01L21/00 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: G06K9/0002 ,  H01L21/565 ,  H01L23/3107 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

Abstract: A method for making an IC package preferably includes providing a mold including first and second mold portions, and wherein the first mold portion carries a mold protrusion defining an IC-contact surface with peripheral edges and a bleed-through retention channel positioned inwardly from the peripheral edges. The method also preferably includes closing the first and second mold portions around the IC and injecting encapsulating material into the mold to encapsulate the IC and make the IC package having an exposed portion of the IC adjacent the mold protrusion. Morever, the bleed-through retention channel retains any encapsulating material bleeding beneath the peripheral edges of the IC contact surface, and prevents the encapsulating material from reaching further onto the exposed portion of the IC. The method may also include releasing the IC package with the exposed portion from the mold.

公开(公告)号：US06667439B2

公开(公告)日：2003-12-23

申请号：US09931378

申请日：2001-08-16

Applicant: Matthew M. Salatino ,  Patrick O. Weber

Inventor： Matthew M. Salatino ,  Patrick O. Weber

IPC: H01L2300

CPC classification number: H01L23/3107 ,  G06K9/0002 ,  H01L21/565 ,  H01L2224/32245 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00

Abstract: An IC package preferably includes an IC and encapsulating material surrounding the IC, with the encapsulating material having an opening therein to define an exposed portion of the IC. Vestigial portions of encapsulating material may be left on the exposed portion of the IC and spaced inwardly from a periphery of the opening based upon molding using a mold protrusion which includes a bleed-through retention channel positioned inwardly from peripheral edges. The channel collects and retains any bleed-through of the encapsulating material. The IC package may further include a leadframe carrying the IC. The leadframe may include a die pad, finger portions, and a plurality of die pad support bars. The die pad may be downset below a level of the finger portions. Each of the die pad support bars may be resiliently deformed to accommodate the downset of the die pad. Low stress encapsulating material and adhesive may also be included in the IC package.

Abstract translation: IC封装优选地包括IC和围绕IC的封装材料，封装材料在其中具有开口以限定IC的暴露部分。 封装材料的残留部分可以留在IC的暴露部分上，并且使用包括从外围边缘向内定位的渗透保持通道的模具突出部，基于模制而从开口的周边向内隔开。 通道收集并保留封装材料的任何渗透。 IC封装还可以包括承载IC的引线框架。 引线框架可以包括管芯焊盘，指状部分和多个管芯焊盘支撑杆。 芯片垫可能在手指部分的水平以下被压低。 每个管芯焊盘支撑杆可以弹性变形以适应管芯焊盘的凹陷。 低应力封装材料和粘合剂也可以包括在IC封装中。

公开(公告)号：US6128195A

公开(公告)日：2000-10-03

申请号：US972845

申请日：1997-11-18

Applicant: Patrick O. Weber ,  Michael A. Brueggeman

Inventor： Patrick O. Weber ,  Michael A. Brueggeman

IPC: H05K3/28 ,  H05K5/02 ,  H05K1/14 ,  H01L23/02 ,  H05K5/00

CPC classification number: H05K5/0269 ,  H05K3/284 ,  Y10S439/946

Abstract: A transfer molded PC card standard or small form factor card electronic package includes a substrate that has an integrated circuit package thereon and an electrical connector along a side of the substrate. In addition, an upper cover extends over at least a portion of the substrate and the electrical connector. A lower cover extends over at least a portion of the substrate and the electrical connector and a transfer molded encapsulant covers the substrate and a portion of the upper cover and the lower cover. The portion of the upper cover and the lower cover are covered by the encapsulant and includes a first flange attached to a portion of a periphery of the upper cover and a second flange that is attached to a portion of the periphery of the lower cover.

Abstract translation: 传输模塑的PC卡标准或小型卡片电子封装包括其上具有集成电路封装的基板和沿着基板的一侧的电连接器。 另外，上盖在基板和电连接器的至少一部分上延伸。 下盖延伸到基板的至少一部分上，并且电连接器和传递模制密封剂覆盖基板和上盖和下盖的一部分。 上盖和下盖的部分被密封剂覆盖，并且包括附接到上盖的周边的一部分的第一凸缘和附接到下盖的周边的一部分的第二凸缘。

公开(公告)号：US6038136A

公开(公告)日：2000-03-14

申请号：US959927

申请日：1997-10-29

Applicant: Patrick O. Weber

Inventor： Patrick O. Weber

IPC: H01L21/56 ,  H01L23/31

CPC classification number: H01L23/3121 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L24/28 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/01006 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161

Abstract: An integrated circuit chip package according to the present invention includes an integrated circuit chip mounted on a substrate by a plurality of solder bumps. A mold compound is used for underfilling air gaps between the chip and the substrate. The integrated circuit chip package is formed by placing the chip and substrate within a mold cavity and pressing a transfer mold compound into the mold cavity. Air spaces between the integrated circuit chip and the substrate are underfilled by the mold compound as it is pressed in between the integrated circuit chip and the substrate. Air is allowed to escape from between the chip and the substrate during the underfilling through a vent which extends through the substrate. The underfilling material may also be used to encapsulate the chip at the same time that underfilling is performed.

Abstract translation: 根据本发明的集成电路芯片封装包括通过多个焊料凸块安装在基板上的集成电路芯片。 模具化合物用于在芯片和基板之间的填充气隙。 集成电路芯片封装通过将芯片和基板放置在模腔内并将转移模具化合物压入模腔中而形成。 集成电路芯片和基板之间的空气间隙被压在集成电路芯片和基板之间时，被模具化合物充满。 在底部填充期间允许空气通过延伸穿过基底的排气口从芯片和基底之间逸出。 底部填充材料也可以用于在进行底部填充的同时封装芯片。